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authorSascha Hauer <s.hauer@pengutronix.de>2013-06-25 17:52:00 +0400
committerShawn Guo <shawn.guo@linaro.org>2013-08-22 19:28:40 +0400
commitaeaa951ff3a0df534d845e9fbaa4f87350b657fe (patch)
tree3fe3ef99cd11c7f7d445de52781b4f00cc88efed /arch/arm/boot/dts/imx51.dtsi
parentdc071436dcaff9d2804de87e686b03cef091ddd3 (diff)
downloadlinux-aeaa951ff3a0df534d845e9fbaa4f87350b657fe.tar.xz
ARM: dts: i.MX51: Add USB host1/2 pinmux entries
This adds pinmux entries for USBH1/2 in ULPI mode. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51.dtsi')
-rw-r--r--arch/arm/boot/dts/imx51.dtsi38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 7eb026ee9fa6..0ca62be7a03e 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -574,6 +574,44 @@
>;
};
};
+
+ usbh1 {
+ pinctrl_usbh1_1: usbh1grp-1 {
+ fsl,pins = <
+ MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
+ MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
+ MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
+ MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
+ MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
+ MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
+ MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
+ MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
+ MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
+ MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
+ MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
+ MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
+ >;
+ };
+ };
+
+ usbh2 {
+ pinctrl_usbh2_1: usbh2grp-1 {
+ fsl,pins = <
+ MX51_PAD_EIM_D16__USBH2_DATA0 0x1e5
+ MX51_PAD_EIM_D17__USBH2_DATA1 0x1e5
+ MX51_PAD_EIM_D18__USBH2_DATA2 0x1e5
+ MX51_PAD_EIM_D19__USBH2_DATA3 0x1e5
+ MX51_PAD_EIM_D20__USBH2_DATA4 0x1e5
+ MX51_PAD_EIM_D21__USBH2_DATA5 0x1e5
+ MX51_PAD_EIM_D22__USBH2_DATA6 0x1e5
+ MX51_PAD_EIM_D23__USBH2_DATA7 0x1e5
+ MX51_PAD_EIM_A24__USBH2_CLK 0x1e5
+ MX51_PAD_EIM_A25__USBH2_DIR 0x1e5
+ MX51_PAD_EIM_A27__USBH2_NXT 0x1e5
+ MX51_PAD_EIM_A26__USBH2_STP 0x1e5
+ >;
+ };
+ };
};
pwm1: pwm@73fb4000 {