summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
diff options
context:
space:
mode:
authorKevin Hilman <khilman@linaro.org>2013-08-23 22:58:01 +0400
committerKevin Hilman <khilman@linaro.org>2013-08-23 22:58:18 +0400
commit334b0f0913a1a980d3167c3bc4415a788225125f (patch)
tree676d3bbd924fc9c7b1cc0bbf054c3259d4be4bcb /arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
parent579673ee1ad62604910c6b8f431aa2a0951589b6 (diff)
parentd45393cd32016ea76a364d1f2e7b58720b2f8135 (diff)
downloadlinux-334b0f0913a1a980d3167c3bc4415a788225125f.tar.xz
Merge tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo: It contains the imx device tree updates for 3.12. - New pinctrl entry additions for various peripherals - Devices enabling for imx6, imx5 and imx27 boards - Add missing device nodes like iim, owire, audmux and sram, etc. - Various updates on boards like phytec, wandboard and sabresd - Consolidate pad macros between imx6q and imx6dl * tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (92 commits) ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ARM: dts: i.MX27: Increase "clock-latency" value ARM: dts: i.MX27: Add label to CPU node ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts')
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts93
1 files changed, 93 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
new file mode 100644
index 000000000000..5a31c776513f
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
@@ -0,0 +1,93 @@
+/*
+ * Copyright 2012 Markus Pargmann, Pengutronix
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx27-phytec-phycard-s-som.dts"
+
+/ {
+ model = "Phytec pca100 rapid development kit";
+ compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
+
+ display: display {
+ model = "Primeview-PD050VL1";
+ native-mode = <&timing0>;
+ bits-per-pixel = <16>; /* non-standard but required */
+ fsl,pcr = <0xf0c88080>; /* non-standard but required */
+ display-timings {
+ timing0: 640x480 {
+ hactive = <640>;
+ vactive = <480>;
+ hback-porch = <112>;
+ hfront-porch = <36>;
+ hsync-len = <32>;
+ vback-porch = <33>;
+ vfront-porch = <33>;
+ vsync-len = <2>;
+ clock-frequency = <25000000>;
+ };
+ };
+ };
+
+ regulators {
+ compatible = "simple-bus";
+
+ reg_3v3: 3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&fb {
+ display = <&display>;
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+
+ adc@64 {
+ compatible = "maxim,max1037";
+ vcc-supply = <&reg_3v3>;
+ reg = <0x64>;
+ };
+};
+
+&owire {
+ status = "okay";
+};
+
+&sdhci2 {
+ cd-gpios = <&gpio3 29 0>;
+ status = "okay";
+};
+
+&uart1 {
+ fsl,uart-has-rtscts;
+ status = "okay";
+};
+
+&uart2 {
+ fsl,uart-has-rtscts;
+ status = "okay";
+};
+
+&uart3 {
+ fsl,uart-has-rtscts;
+ status = "okay";
+};