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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-03 06:13:12 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-03 06:13:12 +0400
commitca41cc96b2813221b05af57d0355157924de5a07 (patch)
tree093d4ca55e6dc4f77c7c8486ec47e9e625e84f17 /arch/arm/boot/dts/highbank.dts
parent3151367f8778a1789d6f6e6f6c642681b6cd6d64 (diff)
parent461b6f0d3d7d4e556035463b531136b034b7433e (diff)
downloadlinux-ca41cc96b2813221b05af57d0355157924de5a07.tar.xz
Merge branch 'for-v3.7' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping
Pull CMA and DMA-mapping updates from Marek Szyprowski: "This time the pull request is rather small, because the further redesign patches were not ready on time. This pull request consists of the patches which extend ARM DMA-mapping subsystem with support for CPU coherent (ACP) DMA busses. The first client of the new version is HighBank SATA driver. The second part of the pull request includes various cleanup for both CMA common code and ARM DMA-mapping subsystem." Fix up trivial add-add conflict due to the "dma-coherent" DT property being added next to the "calxeda,port-phys" property for the Calxeda AHCI controller. * 'for-v3.7' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping: ARM: dma-mapping: Remove unsed var at arm_coherent_iommu_unmap_page ARM: highbank: add coherent DMA setup ARM: kill off arch_is_coherent ARM: add coherent iommu dma ops ARM: add coherent dma ops ARM: dma-mapping: Refrain noisy console message ARM: dma-mapping: Small logical clean up drivers: dma-contiguous: refactor dma_alloc_from_contiguous()
Diffstat (limited to 'arch/arm/boot/dts/highbank.dts')
-rw-r--r--arch/arm/boot/dts/highbank.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index 5204cf73c2d8..0c6fc34821f9 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -124,6 +124,7 @@
calxeda,port-phys = <&combophy5 0 &combophy0 0
&combophy0 1 &combophy0 2
&combophy0 3>;
+ dma-coherent;
};
sdhci@ffe0e000 {