Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Device-tree updates from Olof Johansson:
 "As usual, this is where the bulk of our changes end up landing each
  merge window.

  The individual updates are too many to enumerate, many many platforms
  have seen additions of device descriptions such that they are
  functionally more complete (in fact, this is often the bulk of updates
  we see).

  Instead I've mostly focused on highlighting the new platforms below as
  they are introduced. Sometimes the introduction is of mostly a
  fragment, that later gets filled in on later releases, and in some
  cases it's near-complete platform support. The latter is more common
  for derivative platforms that already has similar support in-tree.

  Two SoCs are slight outliers from the usual range of additions.
  Allwinner support for F1C100s, a quite old SoC (ARMv5-based) shipping
  in the Lychee Pi Nano platform. At the other end is NXP Layerscape
  LX2160A, a 16-core 2.2GHz Cortex-A72 SoC with a large amount of I/O
  aimed at infrastructure/networking.

  TI updates stick out in the diff stats too, in particular because they
  have moved the description of their L4 on-chip interconnect to
  devicetree, which opens up for removal of even more of their
  platform-specific 'hwmod' description tables over the next few
  releases.

  SoCs:
   - Qualcomm QCS404 (4x Cortex-A53)
   - Allwinner T3 (rebranded R40) and f1c100s (armv5)
   - NXP i.MX7ULP (1x Cortex-A7 + 1x Cortex-M4)
   - NXP LS1028A (2x Cortex-A72), LX2160A (16x Cortex-A72)

  New platforms:
   - Rockchip: Gru Scarlet (RK3188 Tablet)
   - Amlogic: Phicomm N1 (S905D), Libretech S805-AC
   - Broadcom: Linksys EA6500 v2 Wi-Fi router (BCM4708)
   - Qualcomm: QCS404 base platform and EVB
   - Qualcomm: Remove of Arrow SD600
   - PXA: First PXA3xx DT board: Raumfeld
   - Aspeed: Facebook Backpack-CMM BMC
   - Renesas iWave G20D-Q7 (RZ/G1N)
   - Allwinner t3-cqa3t-bv3 (T3/R40) and Lichee Pi Nano (F1C100s)
   - Allwinner Emlid Neutis N5, Mapleboard MP130
   - Marvell Macchiatobin Single Shot (Armada 8040, no 10GbE)
   - i.MX: mtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
   - VF610: Liebherr's BK4 device, ZII SCU4 AIB board
   - i.MX7D PICO Hobbit baseboard
   - i.MX7ULP EVK board
   - NXP LX2160AQDS and LX2160ARDB boards

  Other:
   - Coresight binding updates across the board
   - CPU cooling maps updates across the board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (648 commits)
  ARM: dts: suniv: Fix improper bindings include patch
  ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards
  arm64: dts: allwinner: a64: bananapi-m64: Add Bluetooth device node
  ARM: dts: suniv: Fix improper bindings include patch
  arm64: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
  arm64: dts: Remove unused properties from FSL QSPI driver nodes
  ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller
  ARM: dts: imx6sx-sdb: Fix the reg properties for the FSL QSPI nodes
  ARM: dts: Remove unused properties from FSL QSPI driver nodes
  arm64: dts: ti: k3-am654: Enable main domain McSPI0
  arm64: dts: ti: k3-am654: Add McSPI DT nodes
  arm64: dts: ti: k3-am654: Populate power-domain property for UART nodes
  arm64: dts: ti: k3-am654-base-board: Enable ECAP PWM
  arm64: dts: ti: k3-am65-main: Add ECAP PWM node
  arm64: dts: ti: k3-am654-base-board: Add I2C nodes
  arm64: dts: ti: am654-base-board: Add pinmux for main uart0
  arm64: dts: ti: k3-am65: Add pinctrl regions
  dt-bindings: pinctrl: k3: Introduce pinmux definitions
  ARM: dts: exynos: Specify I2S assigned clocks in proper node
  ARM: dts: exynos: Add missing CPUs in cooling maps for Odroid X2
  ...

1 files changed, 40 insertions, 23 deletions

diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
index 6f258b50eb44..cc0c3cf89eaa 100644
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
@@ -28,7 +28,7 @@
 		compatible = "gpio-keys";
 
 		button-esc {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_ESC>;
 			label = "reset";
@@ -36,7 +36,7 @@
 			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
 		};
 		button-eject {
-			debounce-interval = <50>;
+			debounce-interval = <100>;
 			wakeup-source;
 			linux,code = <KEY_EJECTCD>;
 			label = "unmount";
@@ -64,7 +64,6 @@
 		gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
 		gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
 		gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
-		/* Collides with pflash CE1, not so cool */
 		cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
 		num-chipselects = <1>;
 
@@ -253,15 +252,18 @@
 	soc {
 		flash@30000000 {
 			/*
-			 * Flash access is by default disabled, because it
-			 * collides with the Chip Enable signal for the display
-			 * panel, that reuse the parallel flash Chip Select 1
-			 * (CS1). Enabling flash makes graphics stop working.
-			 *
-			 * We might be able to hack around this by letting
-			 * GPIO poke around in the flash controller registers.
+			 * Flash access collides with the Chip Enable signal for
+			 * the display panel, that reuse the parallel flash Chip
+			 * Select 1 (CS1). We switch the pin control state so we
+			 * enable these pins for flash access only when we need
+			 * then, and when disabled they can be used for GPIO which
+			 * is what the display panel needs.
 			 */
-			/* status = "okay"; */
+			status = "okay";
+			pinctrl-names = "enabled", "disabled";
+			pinctrl-0 = <&pflash_default_pins>;
+			pinctrl-1 = <&pflash_disabled_pins>;
+
 			/* 32MB of flash */
 			reg = <0x30000000 0x02000000>;
 
@@ -274,20 +276,16 @@
 				read-only;
 			};
 			/*
-			 * Between the boot loader and the rootfs is the kernel
-			 * in a custom Storlink format flashed from the boot
-			 * menu. The rootfs is in squashfs format.
+			 * This firmware image contains the kernel catenated
+			 * with the squashfs root filesystem. For some reason
+			 * this is called "upgrade" on the vendor system.
 			 */
-			partition@1800c0 {
-				label = "rootfs";
-				reg = <0x001800c0 0x01dbff40>;
-				read-only;
-			};
-			partition@1f40000 {
+			partition@40000 {
 				label = "upgrade";
-				reg = <0x01f40000 0x00040000>;
+				reg = <0x00040000 0x01f40000>;
 				read-only;
 			};
+			/* RGDB, Residental Gateway Database? */
 			partition@1f80000 {
 				label = "rgdb";
 				reg = <0x01f80000 0x00040000>;
@@ -331,7 +329,6 @@
 						"gpio0cgrp",
 						"gpio0egrp",
 						"gpio0fgrp",
-						"gpio0ggrp",
 						"gpio0hgrp";
 					};
 				};
@@ -346,6 +343,18 @@
 						groups = "gpio1bgrp";
 					};
 				};
+				/*
+				 * These GPIO groups will be mapped in over some
+				 * of the flash pins when the flash is not in
+				 * active use.
+				 */
+				pflash_disabled_pins: pinctrl-pflash-disabled {
+					mux {
+						function = "gpio0";
+						groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
+							 "gpio0kgrp";
+					};
+				};
 				pinctrl-gmii {
 					mux {
 						function = "gmii";
@@ -434,7 +443,7 @@
 		};
 
 		display-controller@6a000000 {
-			status = "okay";
+			status = "disabled";
 
 			port@0 {
 				reg = <0>;
@@ -443,5 +452,13 @@
 				};
 			};
 		};
+
+		usb@68000000 {
+			status = "okay";
+		};
+
+		usb@69000000 {
+			status = "okay";
+		};
 	};
 };