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author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2019-12-10 14:40:27 +0300 |
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committer | Krzysztof Kozlowski <krzk@kernel.org> | 2019-12-11 21:18:03 +0300 |
commit | eaffc4de16c66c04ce340174280221960be18ed3 (patch) | |
tree | b2f80ee1a5dab67350da60cdfe36be36a443b8b3 /arch/arm/boot/dts/exynos5800-peach-pi.dts | |
parent | 6c43b5d3964c5d2676e83765ac5a1eee7600f080 (diff) | |
download | linux-eaffc4de16c66c04ce340174280221960be18ed3.tar.xz |
ARM: dts: exynos: Add missing CPU frequencies for Exynos5422/5800
Add missing 2.0GHz, 1.9GHz & 1.8GHz OPPs (for A15 cores) and 1.4GHz
OPP (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4
thermal cooling maps to account for new OPPs.
Since some new OPPs are not available on all Exynos5422/5800 boards
modify dts files for Odroid XU3 Lite (limited to 1.8 GHz / 1.3 GHz) &
Peach Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
This patch uses maximum voltages for new OPPs. This is a temporary
solution till proper Exynos ASV support is added.
Also while at it fix the number of cooling down steps for big cores
(should be 11 instead of 12 on Odroid XU3 Lite and 14 on XU3/XU4).
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
[mszyprow: rebased onto v5.5-rc1 and adapted to recent dts changes,
fixed removal of the 1.4GHz OPP for A7s on Peach-Pi]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5800-peach-pi.dts')
-rw-r--r-- | arch/arm/boot/dts/exynos5800-peach-pi.dts | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index c1e38139ce4f..60ab0effe474 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -156,6 +156,15 @@ assigned-clock-parents = <&clock CLK_MAU_EPLL>; }; +/* + * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores + * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to + * update A7 OPPs table accordingly. + */ +&cluster_a7_opp_table { + /delete-node/opp-1400000000; +}; + &cpu0 { cpu-supply = <&buck2_reg>; }; |