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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2017-09-15 12:11:21 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2017-09-19 20:49:12 +0300 |
| commit | c9c51fd2536e708bbb65873afd3be2f3ac42e951 (patch) | |
| tree | a03de50fafadb9ae3b2cbaae5e4a0b8755c758ae /arch/arm/boot/dts/exynos5250-arndale.dts | |
| parent | c55af083a01ebd1c4b1b06931542e68872ada867 (diff) | |
| download | linux-c9c51fd2536e708bbb65873afd3be2f3ac42e951.tar.xz | |
ARM: dts: exynos: Cleanup HDMI DCC definitions on Exynos5250 and Exynos542x boards
Commit 2b7681326dc2 ("drm/exynos: hdmi: remove the i2c drivers and use")
merged to v3.15 kernel added a required 'ddc' property to Exynos HDMI
device tree bindings, which should point to i2c bus used for handling DDC
(mainly reading display's EDID information). It has been enough time to
convert all boards to use new bindings, but sadly due to copy/paste design
the old approach using separate node with 'samsung,exynos4210-hdmiddc'
compatible was used also for many new boards. This patch finally converts
all boards to the new approach and unifies HDMI DDC definition across all
Exynos boards.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5250-arndale.dts')
| -rw-r--r-- | arch/arm/boot/dts/exynos5250-arndale.dts | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 7ef257b75562..a380cff466ae 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -152,6 +152,7 @@ }; &hdmi { + ddc = <&i2c_2>; hpd-gpios = <&gpx3 7 GPIO_ACTIVE_LOW>; vdd_osc-supply = <&ldo10_reg>; vdd_pll-supply = <&ldo8_reg>; @@ -455,15 +456,9 @@ &i2c_2 { status = "okay"; - + /* used by HDMI DDC */ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; - samsung,i2c-slave-addr = <0x50>; - - hdmiddc@50 { - compatible = "samsung,exynos4210-hdmiddc"; - reg = <0x50>; - }; }; &i2c_3 { |