diff options
author | Tomasz Figa <t.figa@samsung.com> | 2012-11-06 10:09:04 +0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-11-07 03:52:25 +0400 |
commit | 0f7238a1a4727ed515785cc45a55aa88d9933440 (patch) | |
tree | 46f06b7ebb0fa43310412ed9948a39c50afb1003 /arch/arm/boot/dts/exynos4x12.dtsi | |
parent | 3d70f8c617a436c7146ecb81df2265b4626dfe89 (diff) | |
download | linux-0f7238a1a4727ed515785cc45a55aa88d9933440.tar.xz |
ARM: dts: Add support for EXYNOS4X12 SoCs
This patch adds device tree sources for EXYNOS4X12 SoC series
(currently EXYNOS4212 and EXYNOS4412) and enables mach-exynos4-dt
to support these SoCs.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4x12.dtsi')
-rw-r--r-- | arch/arm/boot/dts/exynos4x12.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi new file mode 100644 index 000000000000..906fe8437e75 --- /dev/null +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -0,0 +1,30 @@ +/* + * Samsung's Exynos4x12 SoCs device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12 + * based board files can include this file and provide values for board specfic + * bindings. + * + * Note: This file does not include device nodes for all the controllers in + * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional + * nodes can be added to this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/include/ "exynos4.dtsi" + +/ { + combiner:interrupt-controller@10440000 { + interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, + <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, + <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, + <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, + <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>; + }; +}; |