Merge tag 'arm-soc/for-4.17/devicetree' of https://github.com/Broadcom/stblinux into next/dt

Pull "Broadcom devicetree changes for 4.17" from Florian Fainelli:

This pull request contains Broadcom ARM-based SoCs devicetree changes
for 4.17, please pull the following:

- Henry fixes the pin functions for the JTAG pins, nothing uses this for
  now, but it could be backported eventually if deemed appropriate

- Stefan fixes the register ranges for the bcm2835-i2s nodes in the
  binding document definition, he then fixes the probing of the
  bcm2835-i2s driver by providing an appropriate register range and a
  missing clock. Stefan also makes sure that the appropriate pull
  settings are applied to the pins used on the Raspberry Pi Zero
  Wireless, he then adds the necessary UART node to connected to the
  BCM43438 Bluetooth adapter on the Pi Zero W. He finally enables USB
  OTG mode on the Pi Zero W since he became usable again

- Baruch adds the necessary Device Tree nodes to support the Raspberry
  Pi GPIO expander which is controlled via the VC4 firmware

- Hiroshi adds the missing LEDs on the Buffalo WZR-900DHP router

- Eric adds the DPI hardware block into the BCM283x Device Tree include
  file for future use when an actual panel is available

- Florian updates the Northstar Plus platforms to use port 8 of the
  internal switch as the CPU/management port since necessary code was
  added in the b53 switch driver to support that

* tag 'arm-soc/for-4.17/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: NSP: Switch to port 8 for CPU port
  ARM: bcm2835: Add the DPI hardware to the device tree.
  ARM: dts: BCM5301X: add missing LEDs for Buffalo WZR-900DHP
  ARM: dts: bcm2835-rpi-zero-w: Enable OTG mode
  ARM: dts: bcm2835-rpi-zero-w: Add bcm43438 serial slave
  ARM: dts: bcm283x: Apply pull settings to Zero W relevant groups
  ARM: dts: bcm2837-rpi-3-b: add GPIO expander
  ARM: dts: bcm2835: make the firmware node into a bus
  ARM: dts: bcm283x: Fix probing of bcm2835-i2s
  dt-bindings: bcm283x: Fix register ranges of bcm2835-i2s
  ARM: dts: bcm283x: Fix pin function of JTAG pins

1 files changed, 17 insertions, 3 deletions

diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 9d293decf8d3..ac00e730f898 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -223,6 +223,7 @@
 			gpclk2_gpio43: gpclk2_gpio43 {
 				brcm,pins = <43>;
 				brcm,function = <BCM2835_FSEL_ALT0>;
+				brcm,pull = <BCM2835_PUD_OFF>;
 			};
 
 			i2c0_gpio0: i2c0_gpio0 {
@@ -252,7 +253,7 @@
 
 			jtag_gpio4: jtag_gpio4 {
 				brcm,pins = <4 5 6 12 13>;
-				brcm,function = <BCM2835_FSEL_ALT4>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
 			};
 			jtag_gpio22: jtag_gpio22 {
 				brcm,pins = <22 23 24 25 26 27>;
@@ -335,10 +336,12 @@
 			uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
 				brcm,pins = <30 31>;
 				brcm,function = <BCM2835_FSEL_ALT3>;
+				brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
 			};
 			uart0_gpio32: uart0_gpio32 {
 				brcm,pins = <32 33>;
 				brcm,function = <BCM2835_FSEL_ALT3>;
+				brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
 			};
 			uart0_gpio36: uart0_gpio36 {
 				brcm,pins = <36 37>;
@@ -397,8 +400,8 @@
 
 		i2s: i2s@7e203000 {
 			compatible = "brcm,bcm2835-i2s";
-			reg = <0x7e203000 0x20>,
-			      <0x7e101098 0x02>;
+			reg = <0x7e203000 0x24>;
+			clocks = <&clocks BCM2835_CLOCK_PCM>;
 
 			dmas = <&dma 2>,
 			       <&dma 3>;
@@ -438,6 +441,17 @@
 			interrupts = <2 14>; /* pwa1 */
 		};
 
+		dpi: dpi@7e208000 {
+			compatible = "brcm,bcm2835-dpi";
+			reg = <0x7e208000 0x8c>;
+			clocks = <&clocks BCM2835_CLOCK_VPU>,
+				 <&clocks BCM2835_CLOCK_DPI>;
+			clock-names = "core", "pixel";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		dsi0: dsi@7e209000 {
 			compatible = "brcm,bcm2835-dsi0";
 			reg = <0x7e209000 0x78>;