diff options
author | Stefan Wahren <stefan.wahren@i2se.com> | 2017-12-11 23:39:12 +0300 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-01-04 14:12:46 +0300 |
commit | b12f5d0ffcdcd1dc9c732a5be72afdc6a7d627cf (patch) | |
tree | 9b540f0280e27936247ca62d7d61bc6352cf0b3e /arch/arm/boot/dts/bcm2836.dtsi | |
parent | ad83c7cb2f37fad01f53a8748c6f8067acb2968d (diff) | |
download | linux-b12f5d0ffcdcd1dc9c732a5be72afdc6a7d627cf.tar.xz |
dt-bindings/bcm283x: Define polarity of per-cpu interrupts
This patch define the polarity of the per-cpu interrupts on BCM2836
and BCM2837 in order to avoid the warnings from ARM arch timer code:
arch_timer: WARNING: Invalid trigger for IRQ19, assuming level low
arch_timer: WARNING: Please fix your firmware
arch_timer: cp15 timer(s) running at 19.20MHz (virt).
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm2836.dtsi')
-rw-r--r-- | arch/arm/boot/dts/bcm2836.dtsi | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi index 61e158003509..1dfd76442777 100644 --- a/arch/arm/boot/dts/bcm2836.dtsi +++ b/arch/arm/boot/dts/bcm2836.dtsi @@ -13,24 +13,24 @@ compatible = "brcm,bcm2836-l1-intc"; reg = <0x40000000 0x100>; interrupt-controller; - #interrupt-cells = <1>; + #interrupt-cells = <2>; interrupt-parent = <&local_intc>; }; arm-pmu { compatible = "arm,cortex-a7-pmu"; interrupt-parent = <&local_intc>; - interrupts = <9>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; }; }; timer { compatible = "arm,armv7-timer"; interrupt-parent = <&local_intc>; - interrupts = <0>, // PHYS_SECURE_PPI - <1>, // PHYS_NONSECURE_PPI - <3>, // VIRT_PPI - <2>; // HYP_PPI + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI + <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI + <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI + <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI always-on; }; @@ -76,7 +76,7 @@ compatible = "brcm,bcm2836-armctrl-ic"; reg = <0x7e00b200 0x200>; interrupt-parent = <&local_intc>; - interrupts = <8>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; }; &cpu_thermal { |