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| author | Alex Elder <elder@linaro.org> | 2014-07-01 02:15:39 +0400 |
|---|---|---|
| committer | Matt Porter <mporter@linaro.org> | 2014-07-28 17:41:44 +0400 |
| commit | a62451c3f91af33e47a17f17ae65de76774b2854 (patch) | |
| tree | eae64ee200bd7b7f514db1c0bafb914442edca86 /arch/arm/boot/dts/bcm11351.dtsi | |
| parent | be37a8b5a371850c6367bc984ee61d9de3eacf6a (diff) | |
| download | linux-a62451c3f91af33e47a17f17ae65de76774b2854.tar.xz | |
ARM: dts: enable SMP support for bcm28155
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/bcm11351.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm11351.dtsi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi index 6b05ae6d476f..2ddaa5136611 100644 --- a/arch/arm/boot/dts/bcm11351.dtsi +++ b/arch/arm/boot/dts/bcm11351.dtsi @@ -27,6 +27,25 @@ bootargs = "console=ttyS0,115200n8"; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "brcm,bcm11351-cpu-method"; + secondary-boot-reg = <0x3500417c>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + gic: interrupt-controller@3ff00100 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; |