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author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-05-22 20:01:22 +0400 |
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committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-05-22 20:01:22 +0400 |
commit | 6a84872a3c3090993be108f02f91b4de062a7d32 (patch) | |
tree | eb9029dda4b56efdc1488a8683c00c711075ca18 /arch/arm/boot/dts/at91sam9rl.dtsi | |
parent | d82b40133f2a7d50e491cecb64e4ea01dabd8672 (diff) | |
parent | 138e8f1c4e99cd349e50fd8b18aebbd2716ceb87 (diff) | |
download | linux-6a84872a3c3090993be108f02f91b4de062a7d32.tar.xz |
Merge branch 'at91-3.16-cleanup' into at91-3.16-dt3
Diffstat (limited to 'arch/arm/boot/dts/at91sam9rl.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9rl.dtsi | 46 |
1 files changed, 39 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index 92a52faebef7..ae9c39a28c63 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -48,6 +48,18 @@ reg = <0x20000000 0x04000000>; }; + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; @@ -548,17 +560,11 @@ #size-cells = <0>; #interrupt-cells = <1>; - clk32k: slck { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - main: mainck { compatible = "atmel,at91rm9200-clk-main"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&clk32k>; + clocks = <&main_xtal>; }; plla: pllack { @@ -769,6 +775,32 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; status = "disabled"; }; + + sckc@fffffd50 { + compatible = "atmel,at91sam9x5-sckc"; + reg = <0xfffffd50 0x4>; + + slow_osc: slow_osc { + compatible = "atmel,at91sam9x5-clk-slow-osc"; + #clock-cells = <0>; + atmel,startup-time-usec = <1200000>; + clocks = <&slow_xtal>; + }; + + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + #clock-cells = <0>; + atmel,startup-time-usec = <75>; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + }; + + clk32k: slck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc &slow_osc>; + }; + }; }; }; |