diff options
| author | Eddie James <eajames@linux.ibm.com> | 2021-04-13 22:43:05 +0300 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2021-04-16 05:52:14 +0300 |
| commit | 9a490b28dd838a0bb51948d49dc7d563e159ada7 (patch) | |
| tree | b7751281dce31fb09959202c6a1fbc4977ebfa65 /arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | |
| parent | ee33e2fb3d70267de00f7c0b09e7e3b309a686df (diff) | |
| download | linux-9a490b28dd838a0bb51948d49dc7d563e159ada7.tar.xz | |
ARM: dts: aspeed: Rainier: Fix PCA9552 on bus 8
The second presence detection PCA9552 was incorrectly added to bus 9.
Fixes: 8be44de6f209 ("ARM: dts: aspeed: Rainier: Add presence GPIOs")
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 109 |
1 files changed, 10 insertions, 99 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index 4dbb030f3ebb..49419cd7f853 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -1399,7 +1399,7 @@ reg = <0x51>; }; - pca1: pca9552@61 { + pca_pres2: pca9552@61 { compatible = "nxp,pca9552"; reg = <0x61>; #address-cells = <1>; @@ -1407,6 +1407,15 @@ gpio-controller; #gpio-cells = <2>; + gpio-line-names = + "SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD", + "SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD", + "SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD", + "SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N", + "SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N", + "SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N", + "", "", "", ""; + gpio@0 { reg = <0>; type = <PCA955X_TYPE_GPIO>; @@ -1507,104 +1516,6 @@ compatible = "atmel,24c128"; reg = <0x50>; }; - - pca_pres3: pca9552@61 { - compatible = "nxp,pca9552"; - reg = <0x61>; - #address-cells = <1>; - #size-cells = <0>; - gpio-controller; - #gpio-cells = <2>; - - gpio-line-names = - "SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD", - "SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD", - "SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD", - "SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N", - "SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N", - "SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N", - "", "", "", ""; - - gpio@0 { - reg = <0>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@1 { - reg = <1>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@2 { - reg = <2>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@3 { - reg = <3>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@4 { - reg = <4>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@5 { - reg = <5>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@6 { - reg = <6>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@7 { - reg = <7>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@8 { - reg = <8>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@9 { - reg = <9>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@10 { - reg = <10>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@11 { - reg = <11>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@12 { - reg = <12>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@13 { - reg = <13>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@14 { - reg = <14>; - type = <PCA955X_TYPE_GPIO>; - }; - - gpio@15 { - reg = <15>; - type = <PCA955X_TYPE_GPIO>; - }; - }; }; &i2c10 { |