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authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-01 20:15:15 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-01 20:15:15 +0300
commitac0f6f927db539e03e1f3f61bcd4ed57d5cde7a9 (patch)
tree816e5ac643b15c2050c64a7075f0f7e13d86ea09 /arch/arm/boot/compressed/head.S
parentb1bf9368407ae7e89d8a005bb40beb70a41df539 (diff)
parent9f33be2c3a80bdc2cc08342dd77fac87652e0548 (diff)
downloadlinux-ac0f6f927db539e03e1f3f61bcd4ed57d5cde7a9.tar.xz
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits) ARM: Eliminate decompressor -Dstatic= PIC hack ARM: 5958/1: ARM: U300: fix inverted clk round rate ARM: 5956/1: misplaced parentheses ARM: 5955/1: ep93xx: move timer defines into core.c and document ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c ARM: 5953/1: ep93xx: fix broken build of clock.c ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig ARM: 5949/1: NUC900 add gpio virtual memory map ARM: 5948/1: Enable timer0 to time4 clock support for nuc910 ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk ARM: make_coherent(): fix problems with highpte, part 2 MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself ARM: 5945/1: ep93xx: include correct irq.h in core.c ARM: 5933/1: amba-pl011: support hardware flow control ARM: 5930/1: Add PKMAP area description to memory.txt. ARM: 5929/1: Add checks to detect overlap of memory regions. ARM: 5928/1: Change type of VMALLOC_END to unsigned long. ARM: 5927/1: Make delimiters of DMA area globally visibly. ARM: 5926/1: Add "Virtual kernel memory..." printout. ARM: 5920/1: OMAP4: Enable L2 Cache ... Fix up trivial conflict in arch/arm/mach-mx25/clock.c
Diffstat (limited to 'arch/arm/boot/compressed/head.S')
-rw-r--r--arch/arm/boot/compressed/head.S20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 4fddc509e78e..99b75aa1c2ec 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -22,13 +22,13 @@
#if defined(CONFIG_DEBUG_ICEDCC)
#ifdef CONFIG_CPU_V6
- .macro loadsp, rb
+ .macro loadsp, rb, tmp
.endm
.macro writeb, ch, rb
mcr p14, 0, \ch, c0, c5, 0
.endm
#elif defined(CONFIG_CPU_V7)
- .macro loadsp, rb
+ .macro loadsp, rb, tmp
.endm
.macro writeb, ch, rb
wait: mrc p14, 0, pc, c0, c1, 0
@@ -36,13 +36,13 @@ wait: mrc p14, 0, pc, c0, c1, 0
mcr p14, 0, \ch, c0, c5, 0
.endm
#elif defined(CONFIG_CPU_XSCALE)
- .macro loadsp, rb
+ .macro loadsp, rb, tmp
.endm
.macro writeb, ch, rb
mcr p14, 0, \ch, c8, c0, 0
.endm
#else
- .macro loadsp, rb
+ .macro loadsp, rb, tmp
.endm
.macro writeb, ch, rb
mcr p14, 0, \ch, c1, c0, 0
@@ -58,7 +58,7 @@ wait: mrc p14, 0, pc, c0, c1, 0
.endm
#if defined(CONFIG_ARCH_SA1100)
- .macro loadsp, rb
+ .macro loadsp, rb, tmp
mov \rb, #0x80000000 @ physical base address
#ifdef CONFIG_DEBUG_LL_SER3
add \rb, \rb, #0x00050000 @ Ser3
@@ -67,13 +67,13 @@ wait: mrc p14, 0, pc, c0, c1, 0
#endif
.endm
#elif defined(CONFIG_ARCH_S3C2410)
- .macro loadsp, rb
+ .macro loadsp, rb, tmp
mov \rb, #0x50000000
add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
.endm
#else
- .macro loadsp, rb
- addruart \rb
+ .macro loadsp, rb, tmp
+ addruart \rb, \tmp
.endm
#endif
#endif
@@ -1025,7 +1025,7 @@ phex: adr r3, phexbuf
strb r2, [r3, r1]
b 1b
-puts: loadsp r3
+puts: loadsp r3, r1
1: ldrb r2, [r0], #1
teq r2, #0
moveq pc, lr
@@ -1042,7 +1042,7 @@ puts: loadsp r3
putc:
mov r2, r0
mov r0, #0
- loadsp r3
+ loadsp r3, r1
b 2b
memdump: mov r12, r0