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author | Vineet Gupta <vgupta@synopsys.com> | 2017-02-02 20:09:50 +0300 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2017-02-06 20:37:57 +0300 |
commit | 8ba605b607b7278548c1092b2ac36381627f0839 (patch) | |
tree | 1fb4e234a793d0f579402f510bae8e00ee5a15f1 /arch/arc/plat-eznps | |
parent | b48fba057ca850d69cd8fde5adbbdf927206514b (diff) | |
download | linux-8ba605b607b7278548c1092b2ac36381627f0839.tar.xz |
ARC: [plat-*] ARC_HAS_COH_CACHES no longer relevant
A typical SMP system expects cache coherency. Initial NPS platform
support was slated to be SMP w/o cache coherency.
However it seems the platform now selects that option, so there is no
point in keeping it around.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/plat-eznps')
-rw-r--r-- | arch/arc/plat-eznps/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arc/plat-eznps/Kconfig b/arch/arc/plat-eznps/Kconfig index 1d175cc6ad6d..1595a38e50cd 100644 --- a/arch/arc/plat-eznps/Kconfig +++ b/arch/arc/plat-eznps/Kconfig @@ -5,7 +5,6 @@ menuconfig ARC_PLAT_EZNPS bool "\"EZchip\" ARC dev platform" - select ARC_HAS_COH_CACHES if SMP select CPU_BIG_ENDIAN select CLKSRC_NPS select EZNPS_GIC |