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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-10 18:24:14 +0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-10 18:24:14 +0400 |
commit | 6019958d146a4f127dae727a930f902c92531e6e (patch) | |
tree | 126cfbdafb7008ce9701dd2ccc27c54cab2d36f4 /arch/arc/include/asm/shmparam.h | |
parent | 977b58e1dd6fc2a751fb427798bfb8256476c93e (diff) | |
parent | e7d5bab5efb94a82d80cab3ad68c357ce73ea596 (diff) | |
download | linux-6019958d146a4f127dae727a930f902c92531e6e.tar.xz |
Merge tag 'arc-v3.10-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull second set of arc arch updates from Vineet Gupta:
"Aliasing VIPT dcache support for ARC
I'm satisified with testing, specially with fuse which has
historically given grief to VIPT arches (ARM/PARISC...)"
* tag 'arc-v3.10-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: [TB10x] Remove GENERIC_GPIO
ARC: [mm] Aliasing VIPT dcache support 4/4
ARC: [mm] Aliasing VIPT dcache support 3/4
ARC: [mm] Aliasing VIPT dcache support 2/4
ARC: [mm] Aliasing VIPT dcache support 1/4
ARC: [mm] refactor the core (i|d)cache line ops loops
ARC: [mm] serious bug in vaddr based icache flush
Diffstat (limited to 'arch/arc/include/asm/shmparam.h')
-rw-r--r-- | arch/arc/include/asm/shmparam.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arc/include/asm/shmparam.h b/arch/arc/include/asm/shmparam.h new file mode 100644 index 000000000000..fffeecc04270 --- /dev/null +++ b/arch/arc/include/asm/shmparam.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARC_ASM_SHMPARAM_H +#define __ARC_ASM_SHMPARAM_H + +/* Handle upto 2 cache bins */ +#define SHMLBA (2 * PAGE_SIZE) + +/* Enforce SHMLBA in shmat */ +#define __ARCH_FORCE_SHMLBA + +#endif |