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| author | Bjorn Helgaas <bhelgaas@google.com> | 2016-08-01 20:34:01 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-08-01 20:34:01 +0300 |
| commit | 9454c23852ca6d7aec89fd6fd46a046c323caac3 (patch) | |
| tree | 794be65345027b5adea3720a43124fee338333a5 /arch/arc/include/asm/pgtable.h | |
| parent | a04bee8285a71cdbb9076c3dc38be1f0b9a6b4b3 (diff) | |
| parent | 4ef33685aa0957d771e068b60a5f3ca6b47ade1c (diff) | |
| download | linux-9454c23852ca6d7aec89fd6fd46a046c323caac3.tar.xz | |
Merge branch 'pci/msi-affinity' into next
Conflicts:
drivers/nvme/host/pci.c
Diffstat (limited to 'arch/arc/include/asm/pgtable.h')
| -rw-r--r-- | arch/arc/include/asm/pgtable.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index 034bbdc0ff61..858f98ef7f1b 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h @@ -47,7 +47,7 @@ * Page Tables are purely for Linux VM's consumption and the bits below are * suited to that (uniqueness). Hence some are not implemented in the TLB and * some have different value in TLB. - * e.g. MMU v2: K_READ bit is 8 and so is GLOBAL (possible becoz they live in + * e.g. MMU v2: K_READ bit is 8 and so is GLOBAL (possible because they live in * seperate PD0 and PD1, which combined forms a translation entry) * while for PTE perspective, they are 8 and 9 respectively * with MMU v3: Most bits (except SHARED) represent the exact hardware pos |