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authorVineet Gupta <vgupta@synopsys.com>2014-11-18 15:06:11 +0300
committerVineet Gupta <vgupta@synopsys.com>2015-08-27 12:29:07 +0300
commit9b28829d6da391f67a76dbba07a167e2b554bd10 (patch)
tree856949987dbe487c76ddfad11dac420711ffb61a /arch/arc/include/asm/perf_event.h
parente525c37f8413b19130d0499c7467fed45a94579b (diff)
downloadlinux-9b28829d6da391f67a76dbba07a167e2b554bd10.tar.xz
ARCv2: perf: Finally introduce HS perf unit
With all features in place, the ARC HS pct block can now be effectively allowed to be probed/used Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/perf_event.h')
-rw-r--r--arch/arc/include/asm/perf_event.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arc/include/asm/perf_event.h b/arch/arc/include/asm/perf_event.h
index 5824ab46cb71..5f071762fb1c 100644
--- a/arch/arc/include/asm/perf_event.h
+++ b/arch/arc/include/asm/perf_event.h
@@ -105,8 +105,11 @@ static const char * const arc_pmu_ev_hw_map[] = {
[PERF_COUNT_HW_INSTRUCTIONS] = "iall",
[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmp", /* Excludes ZOL jumps */
[PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */
+#ifdef CONFIG_ISA_ARCV2
+ [PERF_COUNT_HW_BRANCH_MISSES] = "bpmp",
+#else
[PERF_COUNT_HW_BRANCH_MISSES] = "bpfail", /* NP-T, PT-NT, PNT-T */
-
+#endif
[PERF_COUNT_ARC_LDC] = "imemrdc", /* Instr: mem read cached */
[PERF_COUNT_ARC_STC] = "imemwrc", /* Instr: mem write cached */