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author | Andrea Gelmini <andrea.gelmini@gelma.net> | 2016-05-21 14:45:35 +0300 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2016-05-30 07:37:32 +0300 |
commit | 2547476a5e4061f6addb88d5fc837d3a950f54c4 (patch) | |
tree | 714716f146f5b1b5ee3b0afd86e4acd658617e76 /arch/arc/include/asm/entry-compact.h | |
parent | 1a695a905c18548062509178b98bc91e67510864 (diff) | |
download | linux-2547476a5e4061f6addb88d5fc837d3a950f54c4.tar.xz |
Fix typos
Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/entry-compact.h')
-rw-r--r-- | arch/arc/include/asm/entry-compact.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h index e0e1faf03c50..14c310f2e0b1 100644 --- a/arch/arc/include/asm/entry-compact.h +++ b/arch/arc/include/asm/entry-compact.h @@ -76,8 +76,8 @@ * We need to be a bit more cautious here. What if a kernel bug in * L1 ISR, caused SP to go whaco (some small value which looks like * USER stk) and then we take L2 ISR. - * Above brlo alone would treat it as a valid L1-L2 sceanrio - * instead of shouting alound + * Above brlo alone would treat it as a valid L1-L2 scenario + * instead of shouting around * The only feasible way is to make sure this L2 happened in * L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in * L1 ISR before it switches stack |