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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-10 18:24:14 +0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-10 18:24:14 +0400 |
| commit | 6019958d146a4f127dae727a930f902c92531e6e (patch) | |
| tree | 126cfbdafb7008ce9701dd2ccc27c54cab2d36f4 /arch/arc/include/asm/cache.h | |
| parent | 977b58e1dd6fc2a751fb427798bfb8256476c93e (diff) | |
| parent | e7d5bab5efb94a82d80cab3ad68c357ce73ea596 (diff) | |
| download | linux-6019958d146a4f127dae727a930f902c92531e6e.tar.xz | |
Merge tag 'arc-v3.10-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull second set of arc arch updates from Vineet Gupta:
"Aliasing VIPT dcache support for ARC
I'm satisified with testing, specially with fuse which has
historically given grief to VIPT arches (ARM/PARISC...)"
* tag 'arc-v3.10-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: [TB10x] Remove GENERIC_GPIO
ARC: [mm] Aliasing VIPT dcache support 4/4
ARC: [mm] Aliasing VIPT dcache support 3/4
ARC: [mm] Aliasing VIPT dcache support 2/4
ARC: [mm] Aliasing VIPT dcache support 1/4
ARC: [mm] refactor the core (i|d)cache line ops loops
ARC: [mm] serious bug in vaddr based icache flush
Diffstat (limited to 'arch/arc/include/asm/cache.h')
| -rw-r--r-- | arch/arc/include/asm/cache.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index 6632273861fd..d5555fe4742a 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -55,9 +55,6 @@ : "r"(data), "r"(ptr)); \ }) -/* used to give SHMLBA a value to avoid Cache Aliasing */ -extern unsigned int ARC_shmlba; - #define ARCH_DMA_MINALIGN L1_CACHE_BYTES /* |