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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-11 13:19:06 +0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-11 13:19:06 +0400 |
| commit | edae583a6d4d1ad2eb73981787790993fef1bbad (patch) | |
| tree | c1680187bad65be2e1c4d72b25642d42d2efd394 /arch/arc/include/asm/cache.h | |
| parent | 0a759b2466d19c619257fec36f988f93424cf3ae (diff) | |
| parent | 737d5b980be82f722153d8104f7949e4204c5911 (diff) | |
| download | linux-edae583a6d4d1ad2eb73981787790993fef1bbad.tar.xz | |
Merge tag 'arc-v3.13-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC changes from Vineet Gupta:
- Towards a working SMP setup (ASID allocation, TLB Flush,...)
- Support for TRACE_IRQFLAGS, LOCKDEP
- cacheflush backend consolidation for I/D
- Lots of allmodconfig fixlets from Chen
- Other improvements/fixes
* tag 'arc-v3.13-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (25 commits)
ARC: [plat-arcfpga] defconfig update
smp, ARC: kill SMP single function call interrupt
ARC: [SMP] Disallow RTSC
ARC: [SMP] Fix build failures for large NR_CPUS
ARC: [SMP] enlarge possible NR_CPUS
ARC: [SMP] TLB flush
ARC: [SMP] ASID allocation
arc: export symbol for pm_power_off in reset.c
arc: export symbol for save_stack_trace() in stacktrace.c
arc: remove '__init' for get_hw_config_num_irq()
arc: remove '__init' for first_lines_of_secondary()
arc: remove '__init' for setup_processor() and arc_init_IRQ()
arc: kgdb: add default implementation for kgdb_roundup_cpus()
ARC: Fix bogus gcc warning and micro-optimise TLB iteration loop
ARC: Add support for irqflags tracing and lockdep
ARC: Reset the value of Interrupt Priority Register
ARC: Reduce #ifdef'ery for unaligned access emulation
ARC: Change calling convention of do_page_fault()
ARC: cacheflush optim - PTAG can be loop invariant if V-P is const
ARC: cacheflush refactor #3: Unify the {d,i}cache flush leaf helpers
...
Diffstat (limited to 'arch/arc/include/asm/cache.h')
| -rw-r--r-- | arch/arc/include/asm/cache.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index e4abdaac6f9f..2fd3162ec4df 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -17,13 +17,7 @@ #endif #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -/* For a rare case where customers have differently config I/D */ -#define ARC_ICACHE_LINE_LEN L1_CACHE_BYTES -#define ARC_DCACHE_LINE_LEN L1_CACHE_BYTES - -#define ICACHE_LINE_MASK (~(ARC_ICACHE_LINE_LEN - 1)) -#define DCACHE_LINE_MASK (~(ARC_DCACHE_LINE_LEN - 1)) +#define CACHE_LINE_MASK (~(L1_CACHE_BYTES - 1)) /* * ARC700 doesn't cache any access in top 256M. |