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author | Scott Wood <oss@buserror.net> | 2017-03-20 05:37:23 +0300 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-06-01 11:24:13 +0300 |
commit | 80b4ae7acea48774761a54ba8432206b20e4d8f1 (patch) | |
tree | 64cc93e2d92903d1422cc255683f00eca9549115 /Makefile | |
parent | 3d362b1fab97dffaf3f6ef55a03c7dcccfa97fd3 (diff) | |
download | linux-80b4ae7acea48774761a54ba8432206b20e4d8f1.tar.xz |
clk: qoriq: Separate root input clock for core PLLs on ls1012a
ls1012a has separate input root clocks for core PLLs versus the
platform PLL, with the latter described as sysclk in the hw docs.
If a second input clock, named "coreclk", is present, this clock will be
used for the core PLLs.
Signed-off-by: Scott Wood <oss@buserror.net>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'Makefile')
0 files changed, 0 insertions, 0 deletions