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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2022-07-07 16:47:33 +0300
committerBjorn Andersson <andersson@kernel.org>2022-09-14 06:09:24 +0300
commitf2819650aab5b037e5e730c88abcd971e96a1637 (patch)
treea311b250d288d8a856236c94970e5b3fa00de756 /MAINTAINERS
parent157b615066288f84e1812964a439603cfe8c1a19 (diff)
downloadlinux-f2819650aab5b037e5e730c88abcd971e96a1637.tar.xz
arm64: dts: qcom: sm8250: provide additional MSI interrupts
On SM8250 each group of MSI interrupts is mapped to the separate host interrupt. Describe each of interrupts in the device tree for PCIe0 host. Tested on Qualcomm RB5 platform with first group of MSI interrupts being used by the PME and attached ath11k WiFi chip using second group of MSI interrupts. Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220707134733.2436629-7-dmitry.baryshkov@linaro.org
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