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| author | Paul Burton <paul.burton@imgtec.com> | 2015-07-09 12:40:41 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-07-10 12:02:20 +0300 |
| commit | 1e18ac7aeaec357048172695b1fbb461205b166f (patch) | |
| tree | 8e4e1c279276c34e4e5f06b56426f2dbe249f20c /MAINTAINERS | |
| parent | 6b5e741e9a834a8cf2d5b895319045ab17ad37fe (diff) | |
| download | linux-1e18ac7aeaec357048172695b1fbb461205b166f.tar.xz | |
MIPS: c-r4k: Extend way_string array
The L2 cache in the I6400 core has 16 ways, so extend the way_string
array to take such caches into account.
[ralf@linux-mips.org: Other already supported CPUs are free to support
more than 8 ways of cache as well.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10640/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions