summaryrefslogtreecommitdiff
path: root/MAINTAINERS
diff options
context:
space:
mode:
authorRusty Russell <rusty@rustcorp.com.au>2015-02-11 07:54:01 +0300
committerRusty Russell <rusty@rustcorp.com.au>2015-02-11 09:17:43 +0300
commit59eba788db298c3597728774dc3d0f16bdc8a1a4 (patch)
tree90013065e783dade54db4877efef5e2ad68a7644 /MAINTAINERS
parente8330d9bc1f7af7737500aebd3fc1f488e3dbb71 (diff)
downloadlinux-59eba788db298c3597728774dc3d0f16bdc8a1a4.tar.xz
lguest: support backdoor window.
The VIRTIO_PCI_CAP_PCI_CFG in the PCI virtio 1.0 spec allows access to the BAR registers without mapping them. This is a compulsory feature, and we implement it here. There are some subtleties involving access widths which we should note: 4.1.4.7.1 Device Requirements: PCI configuration access capability ... Upon detecting driver write access to pci_cfg_data, the device MUST execute a write access at offset cap.offset at BAR selected by cap.bar using the first cap.length bytes from pci_cfg_data. Upon detecting driver read access to pci_cfg_data, the device MUST execute a read access of length cap.length at offset cap.offset at BAR selected by cap.bar and store the first cap.length bytes in pci_cfg_data. So, for a write, we copy into the pci_cfg_data window, then write from there out to the BAR. This works correctly if cap.length != width of write. Similarly, for a read, we read into window from the BAR then read the value from there. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions