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authorJamie Gibbons <jamie.gibbons@microchip.com>2026-03-26 20:02:34 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-04-11 15:16:25 +0300
commitcca43df95a1f4ecef5e9ab7e582d613888cbf962 (patch)
tree8dd3ca33b52eb3efa2efa935328dd3d6155ce7cc /Documentation
parentf556330d178763d4adcf3d47e4bb5dbb8860525e (diff)
downloadlinux-cca43df95a1f4ecef5e9ab7e582d613888cbf962.tar.xz
dt-bindings: gpio: fix microchip #interrupt-cells
[ Upstream commit 6b5ef8c88854b343b733b574ea8754c9dab61f41 ] The GPIO controller on PolarFire SoC supports more than one type of interrupt and needs two interrupt cells. Fixes: 735806d8a68e9 ("dt-bindings: gpio: add bindings for microchip mpfs gpio") Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260326-wise-gumdrop-49217723a72a@spud Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
index d481e78958a7..2c7355e9547a 100644
--- a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
@@ -33,7 +33,7 @@ properties:
const: 2
"#interrupt-cells":
- const: 1
+ const: 2
ngpios:
description:
@@ -84,7 +84,7 @@ examples:
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupts = <53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,
<53>, <53>, <53>, <53>,