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| author | wangyuhang <wangyuhang2014@gmail.com> | 2013-09-01 13:36:21 +0400 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2013-09-01 16:45:14 +0400 |
| commit | a110f93d8b4672c4ad18d911f62b9e861010e83b (patch) | |
| tree | 18c131e27442012a89f88f5db880d95a60e4dc1f /Documentation | |
| parent | a822e99c70f448c4068ea85bb195dac0b2eb3afe (diff) | |
| download | linux-a110f93d8b4672c4ad18d911f62b9e861010e83b.tar.xz | |
spi: quad: fix the name of DT property
spi: quad: fix the name of DT property in patch
The previous property name spi-tx-nbits and spi-rx-nbits looks not
human-readable. To make it consistent with other devices, using property
name spi-tx-bus-width and spi-rx-bus-width instead of the previous one
specify the number of data wires that spi controller will work in.
Add the specification in spi-bus.txt.
Signed-off-by: wangyuhang <wangyuhang2014@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/spi/spi-bus.txt | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index 296015e3c632..800dafe5b01b 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -55,6 +55,16 @@ contain the following properties. chip select active high - spi-3wire - (optional) Empty property indicating device requires 3-wire mode. +- spi-tx-bus-width - (optional) The bus width(number of data wires) that + used for MOSI. Defaults to 1 if not present. +- spi-rx-bus-width - (optional) The bus width(number of data wires) that + used for MISO. Defaults to 1 if not present. + +Some SPI controllers and devices support Dual and Quad SPI transfer mode. +It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD). +Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is +only 1(SINGLE), 2(DUAL) and 4(QUAD). +Dual/Quad mode is not allowed when 3-wire mode is used. If a gpio chipselect is used for the SPI slave the gpio number will be passed via the cs_gpio |