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| author | Mark Yao <mark.yao@rock-chips.com> | 2017-06-09 10:10:41 +0300 |
|---|---|---|
| committer | Mark Yao <mark.yao@rock-chips.com> | 2017-06-23 03:52:03 +0300 |
| commit | 5e3bc6d1ab48a20cbce3d59d42937bc977ec61cf (patch) | |
| tree | fd9f992c12f98a8004540d3b1b529955fac96dcf /Documentation | |
| parent | 6445e394c54b61974491fccbf2e4fcd990d2fa8b (diff) | |
| download | linux-5e3bc6d1ab48a20cbce3d59d42937bc977ec61cf.tar.xz | |
drm/rockchip: dw_hdmi: introduce the VPLL clock setting
For RK3399 HDMI, there is an external clock need for HDMI PHY,
and it should keep the same clock rate with VOP DCLK.
VPLL have supported the clock for HDMI PHY, but there is no
clock divider bewteen VPLL and HDMI PHY. So we need to set the
VPLL rate manually in HDMI driver.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt index 7039a15b0d04..122d4e8b879b 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt @@ -32,7 +32,7 @@ Optional properties I2C master controller. - clock-names: See dw_hdmi.txt. The "cec" clock is optional. - clock-names: May contain "cec" as defined in dw_hdmi.txt. - +- clock-names: May contain "vpll", external clock for some hdmi phy. Example: |