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authorMark Rutland <mark.rutland@arm.com>2015-09-07 12:49:03 +0300
committerRob Herring <robh@kernel.org>2015-09-17 22:36:35 +0300
commitdc4dae00d82fedcd7a632f786f9f76c1f7f929a5 (patch)
tree5ba1bb42e2fbd23e6c895ea815e64150535b5b52 /Documentation
parentd7ba2a024cf19261b34825f89d30ceef9a5ff864 (diff)
downloadlinux-dc4dae00d82fedcd7a632f786f9f76c1f7f929a5.tar.xz
Docs: dt: add #msi-cells to GICv3 ITS binding
The GICv3 ITS uses sideband master identification data (known as a DeviceID) to identify which master wrote to a doorbell, and this data is used to determine how to react in response to the write. Commit 1e6db000482fa65a ("irqchip/gicv3-its: Add platform MSI support") added support per this binding, but failed to update the documentation. This patch fixes the documentation. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/gic-v3.txt5
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/gic-v3.txt b/Documentation/devicetree/bindings/arm/gic-v3.txt
index ddfade40ac59..7803e77d85cb 100644
--- a/Documentation/devicetree/bindings/arm/gic-v3.txt
+++ b/Documentation/devicetree/bindings/arm/gic-v3.txt
@@ -57,6 +57,8 @@ used to route Message Signalled Interrupts (MSI) to the CPUs.
These nodes must have the following properties:
- compatible : Should at least contain "arm,gic-v3-its".
- msi-controller : Boolean property. Identifies the node as an MSI controller
+- #msi-cells: Must be <1>. The single msi-cell is the DeviceID of the device
+ which will generate the MSI.
- reg: Specifies the base physical address and size of the ITS
registers.
@@ -83,6 +85,7 @@ Examples:
gic-its@2c200000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2c200000 0 0x200000>;
};
};
@@ -107,12 +110,14 @@ Examples:
gic-its@2c200000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2c200000 0 0x200000>;
};
gic-its@2c400000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2c400000 0 0x200000>;
};
};