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| author | Christoffer Dall <c.dall@virtualopensystems.com> | 2013-01-21 03:28:10 +0400 |
|---|---|---|
| committer | Christoffer Dall <c.dall@virtualopensystems.com> | 2013-01-23 22:29:14 +0400 |
| commit | c27581ed32275897651a84043b04ea3ccdd644e0 (patch) | |
| tree | dc541728d54d1c9114eafc3930634434c7912a69 /Documentation/virtual | |
| parent | 1138245ccf9652429630c09fb068e9b12c56c3d3 (diff) | |
| download | linux-c27581ed32275897651a84043b04ea3ccdd644e0.tar.xz | |
KVM: ARM: Demux CCSIDR in the userspace API
The Cache Size Selection Register (CSSELR) selects the current Cache
Size ID Register (CCSIDR). You write which cache you are interested
in to CSSELR, and read the information out of CCSIDR.
Which cache numbers are valid is known by reading the Cache Level ID
Register (CLIDR).
To export this state to userspace, we add a KVM_REG_ARM_DEMUX
numberspace (17), which uses 8 bits to represent which register is
being demultiplexed (0 for CCSIDR), and the lower 8 bits to represent
this demultiplexing (in our case, the CSSELR value, which is 4 bits).
Reviewed-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Diffstat (limited to 'Documentation/virtual')
| -rw-r--r-- | Documentation/virtual/kvm/api.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 0e2287406464..94f17a30edd3 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1805,6 +1805,8 @@ ARM 32-bit CP15 registers have the following id bit patterns: ARM 64-bit CP15 registers have the following id bit patterns: 0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3> +ARM CCSIDR registers are demultiplexed by CSSELR value: + 0x4002 0000 0011 00 <csselr:8> 4.69 KVM_GET_ONE_REG |