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authorWill Deacon <will.deacon@arm.com>2017-10-05 18:49:37 +0300
committerWill Deacon <will.deacon@arm.com>2017-10-20 18:54:54 +0300
commit704c038255d44e821a05835c9bf8c8d0393a4777 (patch)
tree3fad49b1b7f2997b08071d94e00295a09831f4e5 /Documentation/nvdimm
parent6948d4a7e11b37c83df9b508bbf725512d82a77b (diff)
downloadlinux-704c038255d44e821a05835c9bf8c8d0393a4777.tar.xz
iommu/arm-smmu-v3: Ensure we sync STE when only changing config field
The SMMUv3 architecture permits caching of data structures deemed to be "reachable" by the SMU, which includes STEs marked as invalid. When transitioning an STE to a bypass/fault configuration at init or detach time, we mistakenly elide the CMDQ_OP_CFGI_STE operation in some cases, therefore potentially leaving the old STE state cached in the SMMU. This patch fixes the problem by ensuring that we perform the CMDQ_OP_CFGI_STE operation irrespective of the validity of the previous STE. Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reported-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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