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| author | Sricharan R <r.sricharan@ti.com> | 2013-11-08 14:38:48 +0400 |
|---|---|---|
| committer | Rob Herring <rob.herring@calxeda.com> | 2013-12-03 09:35:23 +0400 |
| commit | f1e8e3811486b858bcc7190477bc6e4ea8f3488c (patch) | |
| tree | d2f066498ecfb277486c810e752ab133baa41c99 /Documentation/networking/cxacru.txt | |
| parent | f04bda90392b729fea9b0420b2a87aa6f2abfcd9 (diff) | |
| download | linux-f1e8e3811486b858bcc7190477bc6e4ea8f3488c.tar.xz | |
ARM: dts: doc: Document missing binding for omap5-mpu
The binding and support for omap5-mpu which has a cortex-a15
smp core, gic and integrated L2 cache has been existing for sometime.
So Documenting the missing binding here.
Cc: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'Documentation/networking/cxacru.txt')
0 files changed, 0 insertions, 0 deletions