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authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>2019-07-05 12:56:40 +0300
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2019-07-08 14:28:44 +0300
commit93bad0f5d15f3acd6d2ab0aee4a81ce1fcc6300d (patch)
tree8fedb26f3b255a89b2dc8c1a95cf9c0821ba6bdd /Documentation/devicetree
parentcbd50b3ca3964c79dac65fda277637577e029e8c (diff)
downloadlinux-93bad0f5d15f3acd6d2ab0aee4a81ce1fcc6300d.tar.xz
dt-bindings: PCI: mobiveil: Change gpio_slave and apb_csr to optional
Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" is not used in current code, and "apb_csr" is not used by some platforms. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/pci/mobiveil-pcie.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
index a618d4787dd7..64156993e052 100644
--- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
@@ -10,8 +10,10 @@ Required properties:
interrupt source. The value must be 1.
- compatible: Should contain "mbvl,gpex40-pcie"
- reg: Should contain PCIe registers location and length
+ Mandatory:
"config_axi_slave": PCIe controller registers
"csr_axi_slave" : Bridge config registers
+ Optional:
"gpio_slave" : GPIO registers to control slot power
"apb_csr" : MSI registers