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author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-04-30 23:01:02 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-04-30 23:01:02 +0300 |
commit | 592fa9532d4e4a7590ca383fd537eb4d53fa585a (patch) | |
tree | 48ead2d9a235f00fb2635613b1ed96e6b7d4bd4b /Documentation/devicetree | |
parent | efd8929b9eec1cde120abb36d76dd00ff6711023 (diff) | |
parent | a80f24945fcfdff31bdf04837145e56570741a67 (diff) | |
download | linux-592fa9532d4e4a7590ca383fd537eb4d53fa585a.tar.xz |
Merge branch 'i2c/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang:
- new drivers for Silicon Labs CP2615 and the HiSilicon I2C unit
- bigger refactoring for the MPC driver
- support for full software nodes - no need to work around with only
properties anymore
- we now have 'devm_i2c_add_adapter', too
- sub-system wide fixes for the RPM refcounting problem which often
caused a leak when an error was encountered during probe
- the rest is usual driver updates and improvements
* 'i2c/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (77 commits)
i2c: mediatek: Use scl_int_delay_ns to compensate clock-stretching
i2c: mediatek: Fix wrong dma sync flag
i2c: mediatek: Fix send master code at more than 1MHz
i2c: sh7760: fix IRQ error path
i2c: i801: Add support for Intel Alder Lake PCH-M
i2c: core: Fix spacing error by checkpatch
i2c: s3c2410: simplify getting of_device_id match data
i2c: nomadik: Fix space errors
i2c: iop3xx: Fix coding style issues
i2c: amd8111: Fix coding style issues
i2c: mpc: Drop duplicate message from devm_platform_ioremap_resource()
i2c: mpc: Use device_get_match_data() helper
i2c: mpc: Remove CONFIG_PM_SLEEP ifdeffery
i2c: mpc: Use devm_clk_get_optional()
i2c: mpc: Update license and copyright
i2c: mpc: Interrupt driven transfer
i2c: sh7760: add IRQ check
i2c: rcar: add IRQ check
i2c: mlxbf: add IRQ check
i2c: jz4780: add IRQ check
...
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/i2c/i2c-mpc.txt | 62 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/i2c/i2c-mpc.yaml | 91 |
2 files changed, 91 insertions, 62 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mpc.txt b/Documentation/devicetree/bindings/i2c/i2c-mpc.txt deleted file mode 100644 index 42a390526957..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-mpc.txt +++ /dev/null @@ -1,62 +0,0 @@ -* I2C - -Required properties : - - - reg : Offset and length of the register set for the device - - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a - compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121, - mpc5200 or mpc5200b. For the mpc5121, an additional node - "fsl,mpc5121-i2c-ctrl" is required as shown in the example below. - -Recommended properties : - - - interrupts : <a b> where a is the interrupt number and b is a - field that represents an encoding of the sense and level - information for the interrupt. This should be encoded based on - the information in section 2) depending on the type of interrupt - controller you have. - - fsl,preserve-clocking : boolean; if defined, the clock settings - from the bootloader are preserved (not touched). - - clock-frequency : desired I2C bus clock frequency in Hz. - - fsl,timeout : I2C bus timeout in microseconds. - -Examples : - - /* MPC5121 based board */ - i2c@1740 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c", "fsl-i2c"; - reg = <0x1740 0x20>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - clock-frequency = <100000>; - }; - - i2ccontrol@1760 { - compatible = "fsl,mpc5121-i2c-ctrl"; - reg = <0x1760 0x8>; - }; - - /* MPC5200B based board */ - i2c@3d00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d00 0x40>; - interrupts = <2 15 0>; - interrupt-parent = <&mpc5200_pic>; - fsl,preserve-clocking; - }; - - /* MPC8544 base board */ - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8544-i2c", "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - clock-frequency = <400000>; - fsl,timeout = <10000>; - }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml new file mode 100644 index 000000000000..7b553d559c83 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs + +maintainers: + - Chris Packham <chris.packham@alliedtelesis.co.nz> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - mpc5200-i2c + - fsl,mpc5200-i2c + - fsl,mpc5121-i2c + - fsl,mpc8313-i2c + - fsl,mpc8543-i2c + - fsl,mpc8544-i2c + - const: fsl-i2c + - items: + - const: fsl,mpc5200b-i2c + - const: fsl,mpc5200-i2c + - const: fsl-i2c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + fsl,preserve-clocking: + $ref: /schemas/types.yaml#/definitions/flag + description: | + if defined, the clock settings from the bootloader are + preserved (not touched) + + fsl,timeout: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + I2C bus timeout in microseconds + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + /* MPC5121 based board */ + i2c@1740 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5121-i2c", "fsl-i2c"; + reg = <0x1740 0x20>; + interrupts = <11 0x8>; + interrupt-parent = <&ipic>; + clock-frequency = <100000>; + }; + + /* MPC5200B based board */ + i2c@3d00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5200b-i2c", "fsl,mpc5200-i2c", "fsl-i2c"; + reg = <0x3d00 0x40>; + interrupts = <2 15 0>; + interrupt-parent = <&mpc5200_pic>; + fsl,preserve-clocking; + }; + + /* MPC8544 base board */ + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc8544-i2c", "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + clock-frequency = <400000>; + fsl,timeout = <10000>; + }; +... |