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authorZhao Qiang <qiang.zhao@nxp.com>2016-05-17 05:38:57 +0300
committerScott Wood <oss@buserror.net>2016-07-09 09:12:04 +0300
commitf0590990ba6db16d5ca8af41a3ad9d3cd8567844 (patch)
tree33c0c4bd8ea368fc1d4afa1a7977a9ffabfbf16f /Documentation/devicetree
parent2dc32d6d7f52f3f451b366241ffefaedb8a49243 (diff)
downloadlinux-f0590990ba6db16d5ca8af41a3ad9d3cd8567844.tar.xz
QE: Add IC, SI and SIRAM document to device tree bindings.
Add IC, SI and SIRAM document of QE to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Scott Wood <oss@buserror.net>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt52
1 files changed, 52 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
index 4f8930263dd9..d7afaff5faff 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
@@ -69,6 +69,58 @@ Example:
};
};
+* Interrupt Controller (IC)
+
+Required properties:
+- compatible : should be "fsl,qe-ic".
+- reg : Address range of IC register set.
+- interrupts : interrupts generated by the device.
+- interrupt-controller : this device is a interrupt controller.
+
+Example:
+
+ qeic: interrupt-controller@80 {
+ interrupt-controller;
+ compatible = "fsl,qe-ic";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x80 0x80>;
+ interrupts = <95 2 0 0 94 2 0 0>;
+ };
+
+* Serial Interface Block (SI)
+
+The SI manages the routing of eight TDM lines to the QE block serial drivers
+, the MCC and the UCCs, for receive and transmit.
+
+Required properties:
+- compatible : must be "fsl,<chip>-qe-si". For t1040, must contain
+ "fsl,t1040-qe-si".
+- reg : Address range of SI register set.
+
+Example:
+
+ si1: si@700 {
+ compatible = "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+* Serial Interface Block RAM(SIRAM)
+
+store the routing entries of SI
+
+Required properties:
+- compatible : should be "fsl,<chip>-qe-siram". For t1040, must contain
+ "fsl,t1040-qe-siram".
+- reg : Address range of SI RAM.
+
+Example:
+
+ siram1: siram@1000 {
+ compatible = "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
* QE Firmware Node
This node defines a firmware binary that is embedded in the device tree, for