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author | Icenowy Zheng <icenowy@aosc.xyz> | 2017-03-31 15:44:48 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-04-08 18:51:48 +0300 |
commit | 1a9636426b9f994d57dfe5a64e3f4644747a2e95 (patch) | |
tree | 7f7b47253b29a169a9f21f82ee33f42822b71f74 /Documentation/devicetree/bindings | |
parent | 4a72cda530f87ee0d96c4b79b9e1a865f7761659 (diff) | |
download | linux-1a9636426b9f994d57dfe5a64e3f4644747a2e95.tar.xz |
nvmem: sunxi-sid: add support for H3's SID controller
The H3 SoC have a bigger SID controller, which has its direct read
address at 0x200 position in the SID block, not 0x0.
Also, H3 SID controller has some silicon bug that makes the direct read
value wrong at cold boot, add code to workaround the bug. (This bug has
already been fixed on A64 and later SoCs)
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r-- | Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt index d543ed3f5363..ef06d061913c 100644 --- a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt +++ b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt @@ -1,7 +1,11 @@ Allwinner sunxi-sid Required properties: -- compatible: "allwinner,sun4i-a10-sid" or "allwinner,sun7i-a20-sid" +- compatible: Should be one of the following: + "allwinner,sun4i-a10-sid" + "allwinner,sun7i-a20-sid" + "allwinner,sun8i-h3-sid" + - reg: Should contain registers location and length = Data cells = |