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author | Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> | 2014-02-10 14:10:57 +0400 |
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committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2014-03-12 02:04:52 +0400 |
commit | 926b65e20dc336391dc333309d34bdf7d5fa3f3b (patch) | |
tree | 26cd6534b11138d26f88a9cfae50e8cc8b1d76e5 /Documentation/devicetree/bindings/timer/ti,keystone-timer.txt | |
parent | b4f26440d932d022e109fb7a0518ae291e72f399 (diff) | |
download | linux-926b65e20dc336391dc333309d34bdf7d5fa3f3b.tar.xz |
clocksource: keystone: add bindings for keystone timer
This patch provides bindings for the 64-bit timer in the KeyStone
architecture devices. The timer can be configured as a general-purpose 64-bit
timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
timers, each half can operate in conjunction (chain mode) or independently
(unchained mode) of each other.
It is global timer is a free running up-counter and can generate interrupt
when the counter reaches preset counter values.
Documentation:
http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/timer/ti,keystone-timer.txt')
-rw-r--r-- | Documentation/devicetree/bindings/timer/ti,keystone-timer.txt | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt new file mode 100644 index 000000000000..5fbe361252b4 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt @@ -0,0 +1,29 @@ +* Device tree bindings for Texas instruments Keystone timer + +This document provides bindings for the 64-bit timer in the KeyStone +architecture devices. The timer can be configured as a general-purpose 64-bit +timer, dual general-purpose 32-bit timers. When configured as dual 32-bit +timers, each half can operate in conjunction (chain mode) or independently +(unchained mode) of each other. + +It is global timer is a free running up-counter and can generate interrupt +when the counter reaches preset counter values. + +Documentation: +http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf + +Required properties: + +- compatible : should be "ti,keystone-timer". +- reg : specifies base physical address and count of the registers. +- interrupts : interrupt generated by the timer. +- clocks : the clock feeding the timer clock. + +Example: + +timer@22f0000 { + compatible = "ti,keystone-timer"; + reg = <0x022f0000 0x80>; + interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; + clocks = <&clktimer15>; +}; |