summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/spi/sqi-pic32.txt
diff options
context:
space:
mode:
authorPurna Chandra Mandal <purna.mandal@microchip.com>2016-04-15 14:27:18 +0300
committerMark Brown <broonie@kernel.org>2016-04-18 19:52:46 +0300
commit0a4afaae989c47fd93b73cc83d2c4a46b55aa1b7 (patch)
tree49039c08d7adb748d331b1b092fa0de0645affec /Documentation/devicetree/bindings/spi/sqi-pic32.txt
parent1bcb9f8ceb67803960871ecf4ed2d365a2a919c8 (diff)
downloadlinux-0a4afaae989c47fd93b73cc83d2c4a46b55aa1b7.tar.xz
spi: pic32-sqi: add binding document for PIC32 Quad-SPI driver.
Document Device tree bindings for the quad SPI peripheral found on Microchip PIC32 class devices. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <rob@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi/sqi-pic32.txt')
-rw-r--r--Documentation/devicetree/bindings/spi/sqi-pic32.txt18
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/sqi-pic32.txt b/Documentation/devicetree/bindings/spi/sqi-pic32.txt
new file mode 100644
index 000000000000..c82d021bce50
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/sqi-pic32.txt
@@ -0,0 +1,18 @@
+Microchip PIC32 Quad SPI controller
+-----------------------------------
+Required properties:
+- compatible: Should be "microchip,pic32mzda-sqi".
+- reg: Address and length of SQI controller register space.
+- interrupts: Should contain SQI interrupt.
+- clocks: Should contain phandle of two clocks in sequence, one that drives
+ clock on SPI bus and other that drives SQI controller.
+- clock-names: Should be "spi_ck" and "reg_ck" in order.
+
+Example:
+ sqi1: spi@1f8e2000 {
+ compatible = "microchip,pic32mzda-sqi";
+ reg = <0x1f8e2000 0x200>;
+ clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>;
+ clock-names = "spi_ck", "reg_ck";
+ interrupts = <169 IRQ_TYPE_LEVEL_HIGH>;
+ };