summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/soc
diff options
context:
space:
mode:
authorGeert Uytterhoeven <geert+renesas@glider.be>2022-05-02 15:40:57 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-06-17 10:18:33 +0300
commit774fecc7ece1d5b7c604402ac2daede14825a467 (patch)
treec754c0eeff8d3a221ed876dbbd97c55ce10d8f66 /Documentation/devicetree/bindings/soc
parentf2906aa863381afb0015a9eb7fefad885d4e5a56 (diff)
downloadlinux-774fecc7ece1d5b7c604402ac2daede14825a467.tar.xz
dt-bindings: soc: renesas: Move renesas,prr from arm to soc
The Renesas Product Register DT binding is not a top-level DT binding, hence it does not belong under Documentation/devicetree/bindings/arm/. Move it to Documentation/devicetree/bindings/soc/renesas/. While at it, change the license from GPL-2.0 (only) to GPL-2.0-only OR BSD-2-Clause, to match common practices. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Simon Horman <horms@verge.net.au> Link: https://lore.kernel.org/r/5f124fc332b4b866f5238ada7ac000f4639c88c3.1651495078.git.geert+renesas@glider.be
Diffstat (limited to 'Documentation/devicetree/bindings/soc')
-rw-r--r--Documentation/devicetree/bindings/soc/renesas/renesas,prr.yaml37
1 files changed, 37 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,prr.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,prr.yaml
new file mode 100644
index 000000000000..654c96638e75
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/renesas/renesas,prr.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/renesas/renesas,prr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas Product Register
+
+maintainers:
+ - Geert Uytterhoeven <geert+renesas@glider.be>
+ - Magnus Damm <magnus.damm@gmail.com>
+
+description: |
+ Most Renesas ARM SoCs have a Product Register or Boundary Scan ID
+ Register that allows to retrieve SoC product and revision information.
+ If present, a device node for this register should be added.
+
+properties:
+ compatible:
+ enum:
+ - renesas,prr
+ - renesas,bsid
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0xff000044 4>;
+ };