diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-12 04:35:30 +0300 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-12 04:35:30 +0300 |
commit | d06e4156430e7c5eb4f04dabcaa0d9e2fba335e3 (patch) | |
tree | 6a8e0663a501b321655dd12683a48635474c28f0 /Documentation/devicetree/bindings/serial | |
parent | 8931084c0d017314ad025f19353f7c5c1d3782d8 (diff) | |
parent | f59d261180f3b66367962f1974090815ce710056 (diff) | |
download | linux-d06e4156430e7c5eb4f04dabcaa0d9e2fba335e3.tar.xz |
Merge tag 'devicetree-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
- DT binding schema examples are now validated against the schemas.
Various examples are fixed due to that.
- Sync dtc with upstream version v1.5.0-30-g702c1b6c0e73
- Initial schemas for networking bindings. This includes ethernet, phy
and mdio common bindings with several Allwinner and stmmac converted
to the schema.
- Conversion of more Arm top-level SoC/board bindings to DT schema
- Conversion of PSCI binding to DT schema
- Rework Arm CPU schema to coexist with other CPU schemas
- Add a bunch of missing vendor prefixes and new ones for SoChip,
Sipeed, Kontron, B&R Industrial Automation GmbH, and Espressif
- Add Mediatek UART RX wakeup support to binding
- Add reset to ST UART binding
- Remove some Linuxisms from the endianness common-properties.txt
binding
- Make the flattened DT read-only after init
- Ignore disabled reserved memory nodes
- Clean-up some dead code in FDT functions
* tag 'devicetree-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits)
dt-bindings: vendor-prefixes: add Sipeed
dt-bindings: vendor-prefixes: add SoChip
dt-bindings: 83xx-512x-pci: Drop cell-index property
dt-bindings: serial: add documentation for Rx in-band wakeup support
dt-bindings: arm: Convert RDA Micro board/soc bindings to json-schema
of: unittest: simplify getting the adapter of a client
of/fdt: pass early_init_dt_reserve_memory_arch() with bool type nomap
of/platform: Drop superfluous cast in of_device_make_bus_id()
dt-bindings: usb: ehci: Fix example warnings
dt-bindings: net: Use phy-mode instead of phy-connection-type
dt-bindings: simple-framebuffer: Add requirement for pipelines
dt-bindings: display: Fix simple-framebuffer example
dt-bindings: net: mdio: Add child nodes
dt-bindings: net: mdio: Add address and size cells
dt-bindings: net: mdio: Add a nodename pattern
dt-bindings: mtd: sunxi-nand: Drop 'maxItems' from child 'reg' property
dt-bindings: arm: Limit cpus schema to only check Arm 'cpu' nodes
dt-bindings: backlight: lm3630a: correct schema validation
dt-bindings: net: dwmac: Deprecate the PHY reset properties
dt-bindings: net: sun8i-emac: Convert the binding to a schemas
...
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
-rw-r--r-- | Documentation/devicetree/bindings/serial/mtk-uart.txt | 13 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 1 |
2 files changed, 12 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index c6b5262eb352..6fdffb735fb9 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -23,7 +23,12 @@ Required properties: - reg: The base address of the UART register bank. -- interrupts: A single interrupt specifier. +- interrupts: + index 0: an interrupt specifier for the UART controller itself + index 1: optional, an interrupt specifier with edge sensitivity on Rx pin to + support Rx in-band wake up. If one would like to use this feature, + one must create an addtional pinctrl to reconfigure Rx pin to normal + GPIO before suspend. - clocks : Must contain an entry for each entry in clock-names. See ../clocks/clock-bindings.txt for details. @@ -39,7 +44,11 @@ Example: uart0: serial@11006000 { compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart"; reg = <0x11006000 0x400>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>; clocks = <&uart_clk>, <&bus_clk>; clock-names = "baud", "bus"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart_pin>; + pinctrl-1 = <&uart_pin_sleep>; }; diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt index 9d3efed55deb..a6b19485c9dc 100644 --- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt +++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt @@ -13,6 +13,7 @@ Required properties: - clocks: The input clock of the USART instance Optional properties: +- resets: Must contain the phandle to the reset controller. - pinctrl: The reference on the pins configuration - st,hw-flow-ctrl: bool flag to enable hardware flow control. - rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low, |