diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-26 23:18:36 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-02-26 23:18:36 +0300 |
| commit | f3a2439f20d918930cc4ae8f76fe1c1afd26958f (patch) | |
| tree | b74738bccf65a4d50dd908859537fd39ca13c922 /Documentation/devicetree/bindings/remoteproc | |
| parent | cc38a46de76e15d20bea5768e99af17b65a9caeb (diff) | |
| parent | 7c855ef7137a67bcff0e039691b969428dd8ef6a (diff) | |
| download | linux-f3a2439f20d918930cc4ae8f76fe1c1afd26958f.tar.xz | |
Merge tag 'rproc-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux
Pull remoteproc updates from Bjorn Andersson:
- Support for PRU clients to acquire a control reference to the PRU
instances is introduced, and the PRU now allows specifying
firmware-name in Devicetree. sysfs is requested to be read-only when
the remoteproc instance is consumed by another kernel driver
- Support for the C7xv DSP on AM62A SoC is introduced
- The Devicetree binding for the Qualcomm PAS devices are split up in
multiple files, to better account for the differences in resources
between them. A number of missing Devicetree bindings are added, and
the Qualcomm WCNSS binding is converted to YAML
- A few cleanups are introduced for the Mediatek SCP driver. And a
sanity check of the firmware image is introduced in the Mediatek
driver
- For Qualcomm SC7280 ADSP support is added, MSM8953 gains ADSP and
modem support, SM6115 and SM8550 gains ADSP, CDSP and modem support,
and support for pronto v3 support (used on e.g. MSM8953) is added
- The Qualcomm modem remoteproc driver is modified to use a no-map
reserved-memory region for it's authentication metadata, in order to
avoid fatal security violations caused by accesses from Linux during
the authentication process
- Support for separate loading of a Devicetree blob is added to the PAS
driver, and support for the PAS driver to carve out DSM memory for
the modem is added as well
- The Qualcomm ADSP remoteproc driver gains support for mapping memory
into specific range using the IOMMU. The sysmon driver is
transitioned to strlcpy()
* tag 'rproc-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (69 commits)
dt-bindings: mailbox: qcom,apcs-kpss-global: drop mbox-names from example
dt-bindings: remoteproc: qcom,glink-edge: correct label description
dt-bindings: remoteproc: qcom,glink-rpm-edge: convert to DT schema
dt-bindings: remoteproc: qcom,sm8550-pas: correct power domains
remoteproc: qcom_q6v5_pas: enable sm8550 adsp & cdsp autoboot
dt-bindings: remoteproc: qcom: Add sm6115 pas yaml file
remoteproc: qcom: pas: Add sm6115 remoteprocs
remoteproc: qcom: pas: Adjust the phys addr wrt the mem region
remoteproc: qcom: fix sparse warnings
remoteproc: qcom: replace kstrdup with kstrndup
remoteproc: mediatek: Check the SCP image format
remoteproc: qcom_q6v5_mss: Use a carveout to authenticate modem headers
Revert "remoteproc: qcom_q6v5_mss: map/unmap metadata region before/after use"
dt-bindings: remoteproc: qcom,sc7280-mss-pil: Update memory-region
dt-bindings: remoteproc: qcom,sc7180-mss-pil: Update memory-region
dt-bindings: remoteproc: qcom,msm8996-mss-pil: Update memory region
dt-bindings: remoteproc: qcom,q6v5: Move MSM8996 to schema
remoteproc: qcom_q6v5_pas: add sm8550 adsp, cdsp & mpss compatible & data
remoteproc: qcom_q6v5_pas: add support for assigning memory to firmware
remoteproc: qcom_q6v5_pas: add support for dtb co-firmware loading
...
Diffstat (limited to 'Documentation/devicetree/bindings/remoteproc')
23 files changed, 2768 insertions, 757 deletions
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index c1d9cbc359b4..643ee787a81f 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -17,201 +17,52 @@ properties: compatible: enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,msm8998-slpi-pas - - qcom,qcs404-adsp-pas - - qcom,qcs404-cdsp-pas - - qcom,qcs404-wcss-pas - - qcom,sc7180-mpss-pas - - qcom,sc7280-mpss-pas - - qcom,sc8180x-adsp-pas - - qcom,sc8180x-cdsp-pas - - qcom,sc8180x-mpss-pas - - qcom,sc8280xp-adsp-pas - - qcom,sc8280xp-nsp0-pas - - qcom,sc8280xp-nsp1-pas - qcom,sdm660-adsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - - qcom,sdx55-mpss-pas - - qcom,sm6350-adsp-pas - - qcom,sm6350-cdsp-pas - - qcom,sm6350-mpss-pas - - qcom,sm8150-adsp-pas - - qcom,sm8150-cdsp-pas - - qcom,sm8150-mpss-pas - - qcom,sm8150-slpi-pas - - qcom,sm8250-adsp-pas - - qcom,sm8250-cdsp-pas - - qcom,sm8250-slpi-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-cdsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-cdsp-pas - - qcom,sm8450-mpss-pas - - qcom,sm8450-slpi-pas reg: maxItems: 1 - clocks: - minItems: 1 - maxItems: 8 - - clock-names: - minItems: 1 - maxItems: 8 - - interconnects: - maxItems: 1 - - interrupts: - minItems: 5 - items: - - description: Watchdog interrupt - - description: Fatal interrupt - - description: Ready interrupt - - description: Handover interrupt - - description: Stop acknowledge interrupt - - description: Shutdown acknowledge interrupt - - interrupt-names: - minItems: 5 - items: - - const: wdog - - const: fatal - - const: ready - - const: handover - - const: stop-ack - - const: shutdown-ack - - resets: - minItems: 1 - maxItems: 3 - - reset-names: - minItems: 1 - maxItems: 3 - cx-supply: description: Phandle to the CX regulator px-supply: description: Phandle to the PX regulator - power-domains: - minItems: 1 - maxItems: 3 - - power-domain-names: - minItems: 1 - maxItems: 3 - - firmware-name: - $ref: /schemas/types.yaml#/definitions/string - description: Firmware name for the Hexagon core - - memory-region: - maxItems: 1 - description: Reference to the reserved-memory for the Hexagon core - qcom,qmp: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. - qcom,smem-states: - $ref: /schemas/types.yaml#/definitions/phandle-array - description: States used by the AP to signal the Hexagon core - items: - - description: Stop the modem - - qcom,smem-state-names: - description: The names of the state bits used for SMP2P output - items: - - const: stop - - qcom,halt-regs: - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - - items: - - description: Phandle reference to a syscon representing TCSR - - description: offsets within syscon for q6 halt registers - - description: offsets within syscon for modem halt registers - - description: offsets within syscon for nc halt registers - description: - Phandle reference to a syscon representing TCSR followed by the - three offsets within syscon for q6, modem and nc halt registers. - - smd-edge: - $ref: /schemas/remoteproc/qcom,smd-edge.yaml# - description: - Qualcomm Shared Memory subnode which represents communication edge, - channels and devices related to the ADSP. - unevaluatedProperties: false - - glink-edge: - $ref: /schemas/remoteproc/qcom,glink-edge.yaml# - description: - Qualcomm G-Link subnode which represents communication edge, channels - and devices related to the ADSP. + memory-region: + maxItems: 1 + description: Reference to the reserved-memory for the Hexagon core required: - compatible - - clocks - - clock-names - - interrupts - - interrupt-names - - memory-region - - qcom,smem-states - - qcom,smem-state-names -additionalProperties: false +unevaluatedProperties: false allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# - if: properties: compatible: contains: enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - - qcom,qcs404-adsp-pas - - qcom,qcs404-wcss-pas - - qcom,sc7280-mpss-pas - - qcom,sc8180x-adsp-pas - - qcom,sc8180x-cdsp-pas - - qcom,sc8180x-mpss-pas - - qcom,sc8280xp-adsp-pas - - qcom,sc8280xp-nsp0-pas - - qcom,sc8280xp-nsp1-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - - qcom,sm6350-adsp-pas - - qcom,sm6350-cdsp-pas - - qcom,sm6350-mpss-pas - - qcom,sm8150-adsp-pas - - qcom,sm8150-cdsp-pas - - qcom,sm8150-mpss-pas - - qcom,sm8150-slpi-pas - - qcom,sm8250-adsp-pas - - qcom,sm8250-cdsp-pas - - qcom,sm8250-slpi-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-cdsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-cdsp-pas - - qcom,sm8450-slpi-pas - - qcom,sm8450-mpss-pas then: properties: clocks: @@ -226,6 +77,7 @@ allOf: compatible: contains: enum: + - qcom,msm8996-slpi-pil - qcom,msm8998-slpi-pas then: properties: @@ -243,90 +95,15 @@ allOf: compatible: contains: enum: - - qcom,qcs404-cdsp-pas - then: - properties: - clocks: - items: - - description: XO clock - - description: SWAY clock - - description: TBU clock - - description: BIMC clock - - description: AHB AON clock - - description: Q6SS SLAVE clock - - description: Q6SS MASTER clock - - description: Q6 AXIM clock - clock-names: - items: - - const: xo - - const: sway - - const: tbu - - const: bimc - - const: ahb_aon - - const: q6ss_slave - - const: q6ss_master - - const: q6_axim - - - if: - properties: - compatible: - contains: - enum: - - qcom,sc7180-mpss-pas - then: - properties: - clocks: - items: - - description: XO clock - - description: IFACE clock - - description: BUS clock - - description: NAC clock - - description: SNOC AXI clock - - description: MNOC AXI clock - clock-names: - items: - - const: xo - - const: iface - - const: bus - - const: nav - - const: snoc_axi - - const: mnoc_axi - - - if: - properties: - compatible: - contains: - enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,msm8998-slpi-pas - - qcom,qcs404-adsp-pas - - qcom,qcs404-cdsp-pas - - qcom,qcs404-wcss-pas - - qcom,sc8180x-adsp-pas - - qcom,sc8180x-cdsp-pas - - qcom,sc8280xp-adsp-pas - - qcom,sc8280xp-nsp0-pas - - qcom,sc8280xp-nsp1-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - - qcom,sm6350-adsp-pas - - qcom,sm6350-cdsp-pas - - qcom,sm8150-adsp-pas - - qcom,sm8150-cdsp-pas - - qcom,sm8150-slpi-pas - - qcom,sm8250-adsp-pas - - qcom,sm8250-cdsp-pas - - qcom,sm8250-slpi-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-cdsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-cdsp-pas - - qcom,sm8450-slpi-pas then: properties: interrupts: @@ -339,26 +116,6 @@ allOf: compatible: contains: enum: - - qcom,sc7180-mpss-pas - - qcom,sc7280-mpss-pas - - qcom,sc8180x-mpss-pas - - qcom,sdx55-mpss-pas - - qcom,sm6350-mpss-pas - - qcom,sm8150-mpss-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-mpss-pas - then: - properties: - interrupts: - minItems: 6 - interrupt-names: - minItems: 6 - - - if: - properties: - compatible: - contains: - enum: - qcom,msm8974-adsp-pil then: required: @@ -370,10 +127,9 @@ allOf: contains: enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8998-adsp-pas - - qcom,sm8150-adsp-pas - - qcom,sm8150-cdsp-pas then: properties: power-domains: @@ -406,169 +162,14 @@ allOf: compatible: contains: enum: - - qcom,sc7180-mpss-pas - then: - properties: - power-domains: - items: - - description: CX power domain - - description: MX power domain - - description: MSS power domain - power-domain-names: - items: - - const: cx - - const: mx - - const: mss - - - if: - properties: - compatible: - contains: - enum: - - qcom,sm6350-cdsp-pas - then: - properties: - power-domains: - items: - - description: CX power domain - - description: MX power domain - power-domain-names: - items: - - const: cx - - const: mx - - - if: - properties: - compatible: - contains: - enum: - - qcom,sc7280-mpss-pas - - qcom,sdx55-mpss-pas - - qcom,sm6350-mpss-pas - - qcom,sm8150-mpss-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-mpss-pas - then: - properties: - power-domains: - items: - - description: CX power domain - - description: MSS power domain - power-domain-names: - items: - - const: cx - - const: mss - - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8180x-adsp-pas - - qcom,sc8180x-cdsp-pas - - qcom,sc8280xp-adsp-pas - - qcom,sm6350-adsp-pas - - qcom,sm8150-slpi-pas - - qcom,sm8250-adsp-pas - - qcom,sm8250-slpi-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-slpi-pas - then: - properties: - power-domains: - items: - - description: LCX power domain - - description: LMX power domain - power-domain-names: - items: - - const: lcx - - const: lmx - - - if: - properties: - compatible: - contains: - enum: - - qcom,sm8350-cdsp-pas - - qcom,sm8450-cdsp-pas - then: - properties: - power-domains: - items: - - description: CX power domain - - description: MXC power domain - power-domain-names: - items: - - const: cx - - const: mxc - - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8280xp-nsp0-pas - - qcom,sc8280xp-nsp1-pas - then: - properties: - power-domains: - items: - - description: NSP power domain - power-domain-names: - items: - - const: nsp - - - if: - properties: - compatible: - contains: - enum: - - qcom,qcs404-cdsp-pas - then: - properties: - resets: - items: - - description: CDSP restart - reset-names: - items: - - const: restart - - - if: - properties: - compatible: - contains: - enum: - - qcom,sc7180-mpss-pas - - qcom,sc7280-mpss-pas - then: - properties: - resets: - items: - - description: MSS restart - - description: PDC reset - reset-names: - items: - - const: mss_restart - - const: pdc_reset - - - if: - properties: - compatible: - contains: - enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,msm8998-slpi-pas - - qcom,qcs404-adsp-pas - - qcom,qcs404-cdsp-pas - - qcom,qcs404-wcss-pas - qcom,sdm660-adsp-pas - - qcom,sdx55-mpss-pas then: properties: qcom,qmp: false diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml index 8e133ab55ff3..15e6851e1ff8 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml @@ -42,7 +42,9 @@ properties: maxItems: 1 label: - description: The names of the state bits used for SMP2P output + description: + Name of the edge, used for debugging and identification purposes. The + node name will be used if this is not present. mboxes: maxItems: 1 diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml new file mode 100644 index 000000000000..6e6e69ad9cd7 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -0,0 +1,289 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8916 MSS Peripheral Image Loader (and similar) + +maintainers: + - Stephan Gerhold <stephan@gerhold.net> + +description: + This document describes the hardware for a component that loads and boots + firmware on the Qualcomm MSM8916 Modem Hexagon Core (and similar). + +properties: + compatible: + oneOf: + - enum: + - qcom,msm8909-mss-pil + - qcom,msm8916-mss-pil + - qcom,msm8953-mss-pil + - qcom,msm8974-mss-pil + + - const: qcom,q6v5-pil + description: Deprecated, prefer using qcom,msm8916-mss-pil + deprecated: true + + reg: + items: + - description: MSS QDSP6 registers + - description: RMB registers + + reg-names: + items: + - const: qdsp6 + - const: rmb + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + clocks: + items: + - description: Configuration interface (AXI) clock + - description: Configuration bus (AHB) clock + - description: Boot ROM (AHB) clock + - description: XO proxy clock (control handed over after startup) + + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: xo + + power-domains: + items: + - description: CX proxy power domain (control handed over after startup) + - description: MX proxy power domain (control handed over after startup) + - description: MSS proxy power domain (control handed over after startup) + (only valid for qcom,msm8953-mss-pil) + minItems: 2 + + power-domain-names: + items: + - const: cx + - const: mx + - const: mss # only valid for qcom,msm8953-mss-pil + minItems: 2 + + pll-supply: + description: PLL proxy supply (control handed over after startup) + + mss-supply: + description: MSS power domain supply (only valid for qcom,msm8974-mss-pil) + + resets: + items: + - description: MSS restart control + + reset-names: + items: + - const: mss_restart + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop modem + + qcom,smem-state-names: + description: Names of the states used by the AP to signal the Hexagon core + items: + - const: stop + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Halt registers are used to halt transactions of various sub-components + within MSS. + items: + - items: + - description: phandle to TCSR syscon region + - description: offset to the Q6 halt register + - description: offset to the modem halt register + - description: offset to the nc halt register + + memory-region: + items: + - description: MBA reserved region + - description: MPSS reserved region + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Name of MBA firmware + - description: Name of modem firmware + + bam-dmux: + $ref: /schemas/net/qcom,bam-dmux.yaml# + description: + Qualcomm BAM Data Multiplexer (provides network interface to the modem) + + smd-edge: + $ref: qcom,smd-edge.yaml# + description: + Qualcomm SMD subnode which represents communication edge, channels + and devices related to the DSP. + properties: + label: + enum: + - modem + - hexagon + unevaluatedProperties: false + + # Deprecated properties + cx-supply: + description: CX power domain regulator supply (prefer using power-domains) + deprecated: true + + mx-supply: + description: MX power domain regulator supply (prefer using power-domains) + deprecated: true + + mba: + type: object + description: + MBA reserved region (prefer using memory-region with two items) + properties: + memory-region: true + required: + - memory-region + deprecated: true + + mpss: + type: object + description: + MPSS reserved region (prefer using memory-region with two items) + properties: + memory-region: true + required: + - memory-region + deprecated: true + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - pll-supply + - resets + - reset-names + - qcom,halt-regs + - qcom,smem-states + - qcom,smem-state-names + - smd-edge + +allOf: + - if: + properties: + compatible: + const: qcom,msm8953-mss-pil + then: + properties: + power-domains: + minItems: 3 + power-domain-names: + minItems: 3 + required: + - power-domains + - power-domain-names + else: + properties: + power-domains: + maxItems: 2 + power-domain-names: + maxItems: 2 + + - if: + properties: + compatible: + const: qcom,msm8974-mss-pil + then: + required: + - mss-supply + else: + properties: + mss-supply: false + + # Fallbacks for deprecated properties + - oneOf: + - required: + - memory-region + - required: + - mba + - mpss + - oneOf: + - required: + - power-domains + - power-domain-names + - required: + - cx-supply + - mx-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8916.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc_mpss: remoteproc@4080000 { + compatible = "qcom,msm8916-mss-pil"; + reg = <0x04080000 0x100>, <0x04020000 0x40>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; + + qcom,smem-states = <&hexagon_smp2p_out 0>; + qcom,smem-state-names = "stop"; + qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>; + + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>, + <&xo_board>; + clock-names = "iface", "bus", "mem", "xo"; + + power-domains = <&rpmpd MSM8916_VDDCX>, <&rpmpd MSM8916_VDDMX>; + power-domain-names = "cx", "mx"; + pll-supply = <&pm8916_l7>; + + resets = <&scm 0>; + reset-names = "mss_restart"; + + memory-region = <&mba_mem>, <&mpss_mem>; + + smd-edge { + interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; + + qcom,smd-edge = <0>; + qcom,ipc = <&apcs 8 12>; + qcom,remote-pid = <1>; + + label = "hexagon"; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml new file mode 100644 index 000000000000..c1ac6ca1e759 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml @@ -0,0 +1,393 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8996 MSS Peripheral Image Loader (and similar) + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Sibi Sankar <quic_sibis@quicinc.com> + +description: + MSS Peripheral Image Loader loads and boots firmware on the + Qualcomm Technology Inc. MSM8996 Modem Hexagon Core (and similar). + +properties: + compatible: + enum: + - qcom,msm8996-mss-pil + - qcom,msm8998-mss-pil + - qcom,sdm845-mss-pil + + reg: + items: + - description: MSS QDSP6 registers + - description: RMB registers + + reg-names: + items: + - const: qdsp6 + - const: rmb + + iommus: + items: + - description: MSA Stream 1 + - description: MSA Stream 2 + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + - description: Shutdown acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + - const: shutdown-ack + + clocks: + minItems: 8 + maxItems: 9 + + clock-names: + minItems: 8 + maxItems: 9 + + power-domains: + items: + - description: CX power domain + - description: MX power domain + - description: MSS power domain (only valid for qcom,sdm845-mss-pil) + minItems: 2 + + power-domain-names: + items: + - const: cx + - const: mx + - const: mss # only valid for qcom,sdm845-mss-pil + minItems: 2 + + pll-supply: + description: PLL supply + + resets: + items: + - description: AOSS restart + - description: PDC reset (only valid for qcom,sdm845-mss-pil) + minItems: 1 + + reset-names: + items: + - const: mss_restart + - const: pdc_reset # only valid for qcom,sdm845-mss-pil + minItems: 1 + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop modem + + qcom,smem-state-names: + description: Names of the states used by the AP to signal the Hexagon core + items: + - const: stop + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Halt registers are used to halt transactions of various sub-components + within MSS. + items: + - items: + - description: phandle to TCSR syscon region + - description: offset to the Q6 halt register + - description: offset to the modem halt register + - description: offset to the nc halt register + + memory-region: + items: + - description: MBA reserved region + - description: Modem reserved region + - description: Metadata reserved region + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Name of MBA firmware + - description: Name of modem firmware + + smd-edge: + $ref: /schemas/remoteproc/qcom,smd-edge.yaml# + description: + Qualcomm Shared Memory subnode which represents communication edge, + channels and devices related to the Modem. + unevaluatedProperties: false + + glink-edge: + $ref: /schemas/remoteproc/qcom,glink-edge.yaml# + description: + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the Modem. + unevaluatedProperties: false + + # Deprecated properties + mba: + type: object + description: + MBA reserved region + + properties: + memory-region: true + + required: + - memory-region + + additionalProperties: false + deprecated: true + + mpss: + type: object + description: + MPSS reserved region + + properties: + memory-region: true + + required: + - memory-region + + additionalProperties: false + deprecated: true + + metadata: + type: object + description: + Metadata reserved region + + properties: + memory-region: true + + required: + - memory-region + + additionalProperties: false + deprecated: true + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - power-domain-names + - resets + - reset-names + - qcom,halt-regs + - qcom,smem-states + - qcom,smem-state-names + +allOf: + - if: + properties: + compatible: + const: qcom,msm8996-mss-pil + then: + properties: + clocks: + items: + - description: GCC MSS IFACE clock + - description: GCC MSS BUS clock + - description: GCC MSS MEM clock + - description: RPMH XO clock + - description: GCC MSS GPLL0 clock + - description: GCC MSS SNOC_AXI clock + - description: GCC MSS MNOC_AXI clock + - description: RPMH PNOC clock + - description: GCC MSS PRNG clock + - description: RPMH QDSS clock + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: xo + - const: gpll0_mss + - const: snoc_axi + - const: mnoc_axi + - const: pnoc + - const: qdss + glink-edge: false + required: + - pll-supply + - smd-edge + else: + properties: + pll-supply: false + smd-edge: false + + - if: + properties: + compatible: + const: qcom,msm8998-mss-pil + then: + properties: + clocks: + items: + - description: GCC MSS IFACE clock + - description: GCC MSS BUS clock + - description: GCC MSS MEM clock + - description: GCC MSS GPLL0 clock + - description: GCC MSS SNOC_AXI clock + - description: GCC MSS MNOC_AXI clock + - description: RPMH QDSS clock + - description: RPMH XO clock + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: gpll0_mss + - const: snoc_axi + - const: mnoc_axi + - const: qdss + - const: xo + required: + - glink-edge + + - if: + properties: + compatible: + const: qcom,sdm845-mss-pil + then: + properties: + power-domains: + minItems: 3 + power-domain-names: + minItems: 3 + resets: + minItems: 2 + reset-names: + minItems: 2 + clocks: + items: + - description: GCC MSS IFACE clock + - description: GCC MSS BUS clock + - description: GCC MSS MEM clock + - description: GCC MSS GPLL0 clock + - description: GCC MSS SNOC_AXI clock + - description: GCC MSS MNOC_AXI clock + - description: GCC MSS PRNG clock + - description: RPMH XO clock + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: gpll0_mss + - const: snoc_axi + - const: mnoc_axi + - const: prng + - const: xo + required: + - qcom,qmp + - glink-edge + else: + properties: + iommus: false + power-domains: + maxItems: 2 + power-domain-names: + maxItems: 2 + resets: + maxItems: 1 + reset-names: + maxItems: 1 + qcom,qmp: false + + # Fallbacks for deprecated properties + - oneOf: + - required: + - memory-region + - required: + - mba + - mpss + - metadata + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/reset/qcom,sdm845-aoss.h> + #include <dt-bindings/reset/qcom,sdm845-pdc.h> + + remoteproc@4080000 { + compatible = "qcom,sdm845-mss-pil"; + reg = <0x04080000 0x408>, <0x04180000 0x48>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack", + "shutdown-ack"; + + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>, + <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>, + <&gcc GCC_MSS_SNOC_AXI_CLK>, + <&gcc GCC_MSS_MFAB_AXIS_CLK>, + <&gcc GCC_PRNG_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "bus", "mem", "gpll0_mss", + "snoc_axi", "mnoc_axi", "prng", "xo"; + + power-domains = <&rpmhpd SDM845_CX>, + <&rpmhpd SDM845_MX>, + <&rpmhpd SDM845_MSS>; + power-domain-names = "cx", "mx", "mss"; + + memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>; + + resets = <&aoss_reset AOSS_CC_MSS_RESTART>, + <&pdc_reset PDC_MODEM_SYNC_RESET>; + reset-names = "mss_restart", "pdc_reset"; + + qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; + label = "modem"; + qcom,remote-pid = <1>; + mboxes = <&apss_shared 12>; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml new file mode 100644 index 000000000000..171ef85de193 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Peripheral Authentication Service Common Properties + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Common properties of Qualcomm SoCs Peripheral Authentication Service. + +properties: + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 + + interconnects: + maxItems: 1 + + interrupts: + minItems: 5 + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + - description: Shutdown acknowledge interrupt + + interrupt-names: + minItems: 5 + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + - const: shutdown-ack + + power-domains: + minItems: 1 + maxItems: 3 + + power-domain-names: + minItems: 1 + maxItems: 3 + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop the modem + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output + items: + - const: stop + + smd-edge: + $ref: /schemas/remoteproc/qcom,smd-edge.yaml# + description: + Qualcomm Shared Memory subnode which represents communication edge, + channels and devices related to the ADSP. + unevaluatedProperties: false + + glink-edge: + $ref: /schemas/remoteproc/qcom,glink-edge.yaml# + description: + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the ADSP. + unevaluatedProperties: false + +required: + - clocks + - clock-names + - interrupts + - interrupt-names + - memory-region + - qcom,smem-states + - qcom,smem-state-names + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index d0ebd16ee0e1..573a88b60677 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -7,14 +7,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: <string> Definition: must be one of: - "qcom,q6v5-pil", "qcom,ipq8074-wcss-pil" "qcom,qcs404-wcss-pil" - "qcom,msm8916-mss-pil", - "qcom,msm8974-mss-pil" - "qcom,msm8996-mss-pil" - "qcom,msm8998-mss-pil" - "qcom,sdm845-mss-pil" - reg: Usage: required @@ -35,26 +29,7 @@ on the Qualcomm Hexagon core. - interrupt-names: Usage: required Value type: <stringlist> - Definition: The interrupts needed depends on the compatible - string: - qcom,q6v5-pil: - qcom,ipq8074-wcss-pil: - qcom,qcs404-wcss-pil: - qcom,msm8916-mss-pil: - qcom,msm8974-mss-pil: - must be "wdog", "fatal", "ready", "handover", "stop-ack" - qcom,msm8996-mss-pil: - qcom,msm8998-mss-pil: - qcom,sdm845-mss-pil: - must be "wdog", "fatal", "ready", "handover", "stop-ack", - "shutdown-ack" - -- firmware-name: - Usage: optional - Value type: <stringlist> - Definition: must list the relative firmware image paths for mba and - modem. They are used for booting and authenticating the - Hexagon core. + Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" - clocks: Usage: required @@ -72,67 +47,23 @@ on the Qualcomm Hexagon core. "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", "lcc_axim_cbc", "lcc_bcr_sleep" - qcom,q6v5-pil: - qcom,msm8916-mss-pil: - qcom,msm8974-mss-pil: - must be "iface", "bus", "mem", "xo" - qcom,msm8996-mss-pil: - must be "iface", "bus", "mem", "xo", "gpll0_mss", - "snoc_axi", "mnoc_axi", "pnoc", "qdss" - qcom,msm8998-mss-pil: - must be "iface", "bus", "mem", "xo", "gpll0_mss", - "snoc_axi", "mnoc_axi", "qdss" - qcom,sdm845-mss-pil: - must be "iface", "bus", "mem", "xo", "gpll0_mss", - "snoc_axi", "mnoc_axi", "prng" - resets: Usage: required Value type: <phandle> - Definition: reference to the reset-controller for the modem sub-system - reference to the list of 3 reset-controllers for the + Definition: reference to the list of 3 reset-controllers for the wcss sub-system - reference to the list of 2 reset-controllers for the modem - sub-system on SDM845 SoCs - reset-names: Usage: required Value type: <stringlist> - Definition: must be "mss_restart" for the modem sub-system - must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" + Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" for the wcss sub-system - must be "mss_restart", "pdc_reset" for the modem - sub-system on SDM845 SoCs -For devices where the mba and mpss sub-nodes are not specified, mba/mpss region -should be referenced as follows: - memory-region: Usage: required Value type: <phandle> - Definition: reference to the reserved-memory for the mba region followed - by the mpss region - -For the compatible strings below the following supplies are required: - "qcom,q6v5-pil" - "qcom,msm8916-mss-pil", -- cx-supply: (deprecated, use power domain instead) -- mx-supply: (deprecated, use power domain instead) -- pll-supply: - Usage: required - Value type: <phandle> - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - -For the compatible string below the following supplies are required: - "qcom,msm8974-mss-pil" -- cx-supply: (deprecated, use power domain instead) -- mss-supply: -- mx-supply: (deprecated, use power domain instead) -- pll-supply: - Usage: required - Value type: <phandle> - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core + Definition: reference to wcss reserved-memory region. For the compatible string below the following supplies are required: "qcom,qcs404-wcss-pil" @@ -142,39 +73,6 @@ For the compatible string below the following supplies are required: Definition: reference to the regulators to be held on behalf of the booting of the Hexagon core -For the compatible string below the following supplies are required: - "qcom,msm8996-mss-pil" -- pll-supply: - Usage: required - Value type: <phandle> - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - -- power-domains: - Usage: required - Value type: <phandle> - Definition: reference to power-domains that match power-domain-names - -- power-domain-names: - Usage: required - Value type: <stringlist> - Definition: The power-domains needed depend on the compatible string: - qcom,ipq8074-wcss-pil: - no power-domain names required - qcom,q6v5-pil: - qcom,msm8916-mss-pil: - qcom,msm8974-mss-pil: - qcom,msm8996-mss-pil: - qcom,msm8998-mss-pil: - must be "cx", "mx" - qcom,sdm845-mss-pil: - must be "cx", "mx", "mss" - -- qcom,qmp: - Usage: optional - Value type: <phandle> - Definition: reference to the AOSS side-channel message RAM. - - qcom,smem-states: Usage: required Value type: <phandle> @@ -190,16 +88,9 @@ For the compatible string below the following supplies are required: Usage: required Value type: <prop-encoded-array> Definition: a phandle reference to a syscon representing TCSR followed - by the three offsets within syscon for q6, modem and nc + by the three offsets within syscon for q6, wcss and nc halt registers. -The Hexagon node must contain iommus property as described in ../iommu/iommu.txt -on platforms which do not have TrustZone. - -= SUBNODES: -The Hexagon node must contain two subnodes, named "mba" and "mpss" representing -the memory regions used by the Hexagon firmware. Each sub-node must contain: - - memory-region: Usage: required Value type: <phandle> @@ -209,56 +100,3 @@ The Hexagon node may also have an subnode named either "smd-edge" or "glink-edge" that describes the communication edge, channels and devices related to the Hexagon. See ../soc/qcom/qcom,smd.yaml and ../soc/qcom/qcom,glink.txt for details on how to describe these. - -= EXAMPLE -The following example describes the resources needed to boot control the -Hexagon, as it is found on MSM8974 boards. - - remoteproc@fc880000 { - compatible = "qcom,msm8974-mss-pil"; - reg = <0xfc880000 0x100>, <0xfc820000 0x020>; - reg-names = "qdsp6", "rmb"; - - interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; - - clocks = <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, - <&gcc GCC_MSS_CFG_AHB_CLK>, - <&gcc GCC_BOOT_ROM_AHB_CLK>, - <&xo_board>; - clock-names = "iface", "bus", "mem", "xo"; - - resets = <&gcc GCC_MSS_RESTART>; - reset-names = "mss_restart"; - - cx-supply = <&pm8841_s2>; - mss-supply = <&pm8841_s3>; - mx-supply = <&pm8841_s1>; - pll-supply = <&pm8941_l12>; - - qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>; - - qcom,smem-states = <&modem_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - mba { - memory-region = <&mba_region>; - }; - - mpss { - memory-region = <&mpss_region>; - }; - - smd-edge { - interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; - - qcom,ipc = <&apcs 8 12>; - qcom,smd-edge = <0>; - - label = "modem"; - }; - }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml new file mode 100644 index 000000000000..5efa0e5c0439 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCS404 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm QCS404 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,qcs404-adsp-pas + - qcom,qcs404-cdsp-pas + - qcom,qcs404-wcss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + interrupts: + maxItems: 5 + + interrupt-names: + maxItems: 5 + + power-domains: false + power-domain-names: false + smd-edge: false + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + remoteproc@c700000 { + compatible = "qcom,qcs404-adsp-pas"; + reg = <0x0c700000 0x4040>; + + clocks = <&xo_board>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_fw_mem>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; + + qcom,remote-pid = <2>; + mboxes = <&apcs_glb 8>; + + label = "adsp"; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml index e4a7da8020f4..b1402bef0ebe 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml @@ -95,6 +95,7 @@ properties: items: - description: MBA reserved region - description: modem reserved region + - description: metadata reserved region firmware-name: $ref: /schemas/types.yaml#/definitions/string-array @@ -223,7 +224,7 @@ examples: <&rpmhpd SC7180_MSS>; power-domain-names = "cx", "mx", "mss"; - memory-region = <&mba_mem>, <&mpss_mem>; + memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>; qcom,qmp = <&aoss_qmp>; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml new file mode 100644 index 000000000000..5cefd2c58593 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7180/SC7280 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm SC7180/SC7280 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sc7180-mpss-pas + - qcom,sc7280-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + interrupts: + minItems: 6 + + interrupt-names: + minItems: 6 + + power-domains: + minItems: 2 + items: + - description: CX power domain + - description: MX power domain + - description: MSS power domain + + power-domain-names: + minItems: 2 + items: + - const: cx + - const: mx + - const: mss + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sc7180-mpss-pas + then: + properties: + power-domains: + minItems: 3 + power-domain-names: + minItems: 3 + else: + properties: + power-domains: + maxItems: 2 + power-domain-names: + maxItems: 2 + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc@4080000 { + compatible = "qcom,sc7180-mpss-pas"; + reg = <0x04080000 0x4040>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + memory-region = <&mpss_mem>; + + power-domains = <&rpmhpd SC7180_CX>, + <&rpmhpd SC7180_MX>, + <&rpmhpd SC7180_MSS>; + power-domain-names = "cx", "mx", "mss"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; + label = "modem"; + qcom,remote-pid = <1>; + mboxes = <&apss_shared 12>; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml new file mode 100644 index 000000000000..94ca7a0cc203 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml @@ -0,0 +1,195 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7280 ADSP Peripheral Image Loader + +maintainers: + - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> + +description: + This document describes the hardware for a component that loads and boots firmware + on the Qualcomm Technology Inc. ADSP. + +properties: + compatible: + enum: + - qcom,sc7280-adsp-pil + + reg: + items: + - description: qdsp6ss register + - description: efuse q6ss register + + iommus: + items: + - description: Phandle to apps_smmu node with sid mask + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + - description: Shutdown acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + - const: shutdown-ack + + clocks: + items: + - description: XO clock + - description: GCC CFG NOC LPASS clock + + clock-names: + items: + - const: xo + - const: gcc_cfg_noc_lpass + + power-domains: + items: + - description: LCX power domain + + resets: + items: + - description: PDC AUDIO SYNC RESET + - description: CC LPASS restart + + reset-names: + items: + - const: pdc_sync + - const: cc_lpass + + memory-region: + maxItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandle reference to a syscon representing TCSR followed by the + four offsets within syscon for q6, modem, nc and qv6 halt registers. + items: + - items: + - description: phandle to TCSR_MUTEX registers + - description: offset to the Q6 halt register + - description: offset to the modem halt register + - description: offset to the nc halt register + - description: offset to the vq6 halt register + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop the modem + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output + const: stop + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + glink-edge: + $ref: qcom,glink-edge.yaml# + type: object + unevaluatedProperties: false + description: | + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the ADSP. + + properties: + label: + const: lpass + + gpr: true + apr: false + fastrpc: false + + required: + - label + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + - reset-names + - qcom,halt-regs + - memory-region + - qcom,smem-states + - qcom,smem-state-names + - qcom,qmp + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,lpass-sc7280.h> + #include <dt-bindings/reset/qcom,sdm845-aoss.h> + #include <dt-bindings/reset/qcom,sdm845-pdc.h> + #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + + remoteproc@3000000 { + compatible = "qcom,sc7280-adsp-pil"; + reg = <0x03000000 0x5000>, + <0x0355b000 0x10>; + + interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack", "shutdown-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_CFG_NOC_LPASS_CLK>; + clock-names = "xo", "gcc_cfg_noc_lpass"; + + power-domains = <&rpmhpd SC7280_LCX>; + + resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>, + <&aoss_reset AOSS_CC_LPASS_RESTART>; + reset-names = "pdc_sync", "cc_lpass"; + + qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>; + + memory-region = <&adsp_mem>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + qcom,qmp = <&aoss_qmp>; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml index b4de0521a89d..005cb21732af 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml @@ -95,6 +95,7 @@ properties: items: - description: MBA reserved region - description: modem reserved region + - description: metadata reserved region firmware-name: $ref: /schemas/types.yaml#/definitions/string-array @@ -240,7 +241,7 @@ examples: <&rpmhpd SC7280_MSS>; power-domain-names = "cx", "mss"; - memory-region = <&mba_mem>, <&mpss_mem>; + memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>; qcom,qmp = <&aoss_qmp>; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml new file mode 100644 index 000000000000..c1f8dd8d0e4c --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc8180x-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC8180X Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm SC8180X SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + - qcom,sc8180x-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + else: + properties: + # TODO: incomplete + power-domains: false + power-domain-names: false + +unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml new file mode 100644 index 000000000000..f6fbc531dc28 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml @@ -0,0 +1,147 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC8280XP Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm SC8280XP SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sc8280xp-adsp-pas + - qcom,sc8280xp-nsp0-pas + - qcom,sc8280xp-nsp1-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sc8280xp-nsp0-pas + - qcom,sc8280xp-nsp1-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sc8280xp-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + else: + properties: + power-domains: + items: + - description: NSP power domain + power-domain-names: + items: + - const: nsp + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc@3000000 { + compatible = "qcom,sc8280xp-adsp-pas"; + reg = <0x03000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + firmware-name = "qcom/sc8280xp/qcadsp8280.mbn"; + + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack", "shutdown-ack"; + + memory-region = <&pil_adsp_mem>; + + power-domains = <&rpmhpd SC8280XP_LCX>, + <&rpmhpd SC8280XP_LMX>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml new file mode 100644 index 000000000000..c66e298462c7 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sdx55-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDX55 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm SDX55 SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sdx55-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + interrupts: + minItems: 6 + + interrupt-names: + minItems: 6 + + power-domains: + items: + - description: CX power domain + - description: MSS power domain + + power-domain-names: + items: + - const: cx + - const: mss + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc@4080000 { + compatible = "qcom,sdx55-mpss-pas"; + reg = <0x04080000 0x4040>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + memory-region = <&mpss_adsp_mem>; + + power-domains = <&rpmhpd SDX55_CX>, <&rpmhpd SDX55_MSS>; + power-domain-names = "cx", "mss"; + + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = <GIC_SPI 114 IRQ_TYPE_EDGE_RISING>; + label = "mpss"; + mboxes = <&apcs 15>; + qcom,remote-pid = <1>; + + /* ... */ + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml new file mode 100644 index 000000000000..f5d1fa9f45f1 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm6115-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6115 Peripheral Authentication Service + +maintainers: + - Bhupesh Sharma <bhupesh.sharma@linaro.org> + +description: + Qualcomm SM6115 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm6115-adsp-pas + - qcom,sm6115-cdsp-pas + - qcom,sm6115-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm6115-adsp-pas + - qcom,sm6115-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sm6115-cdsp-pas + - qcom,sm6115-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + power-domain-names: + items: + - const: cx + + - if: + properties: + compatible: + enum: + - qcom,sm6115-adsp-pas + then: + properties: + power-domains: + items: + - description: LPI CX power domain + - description: LPI MX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmcc.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc@ab00000 { + compatible = "qcom,sm6115-adsp-pas"; + reg = <0x0ab00000 0x100>; + + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "xo"; + + firmware-name = "qcom/sm6115/adsp.mdt"; + + interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&pil_adsp_mem>; + + power-domains = <&rpmpd SM6115_VDD_LPI_CX>, + <&rpmpd SM6115_VDD_LPI_MX>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; + label = "lpass"; + qcom,remote-pid = <2>; + mboxes = <&apcs_glb 8>; + + /* ... */ + + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml new file mode 100644 index 000000000000..fee02fa800b5 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml @@ -0,0 +1,167 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6350 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm SM6350 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm6350-adsp-pas + - qcom,sm6350-cdsp-pas + - qcom,sm6350-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm6350-adsp-pas + - qcom,sm6350-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sm6350-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sm6350-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MX power domain + power-domain-names: + items: + - const: cx + - const: mx + + - if: + properties: + compatible: + enum: + - qcom,sm6350-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MSS power domain + power-domain-names: + items: + - const: cx + - const: mss + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc@3000000 { + compatible = "qcom,sm6350-adsp-pas"; + reg = <0x03000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&pil_adsp_mem>; + + power-domains = <&rpmhpd SM6350_LCX>, + <&rpmhpd SM6350_LMX>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml new file mode 100644 index 000000000000..2c085ac2c3fb --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml @@ -0,0 +1,174 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm8150-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8150/SM8250 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm SM8150/SM8250 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm8150-adsp-pas + - qcom,sm8150-cdsp-pas + - qcom,sm8150-mpss-pas + - qcom,sm8150-slpi-pas + - qcom,sm8250-adsp-pas + - qcom,sm8250-cdsp-pas + - qcom,sm8250-slpi-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8150-adsp-pas + - qcom,sm8150-cdsp-pas + - qcom,sm8150-slpi-pas + - qcom,sm8250-adsp-pas + - qcom,sm8250-cdsp-pas + - qcom,sm8250-slpi-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sm8150-adsp-pas + - qcom,sm8150-cdsp-pas + - qcom,sm8250-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + power-domain-names: + items: + - const: cx + + - if: + properties: + compatible: + enum: + - qcom,sm8150-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MSS power domain + power-domain-names: + items: + - const: cx + - const: mss + + - if: + properties: + compatible: + enum: + - qcom,sm8150-slpi-pas + - qcom,sm8250-adsp-pas + - qcom,sm8250-slpi-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc@17300000 { + compatible = "qcom,sm8150-adsp-pas"; + reg = <0x17300000 0x4040>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + firmware-name = "qcom/sm8150/adsp.mbn"; + + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_mem>; + + power-domains = <&rpmhpd SM8150_CX>; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; + label = "lpass"; + qcom,remote-pid = <2>; + mboxes = <&apss_shared 8>; + + /* ... */ + + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml new file mode 100644 index 000000000000..af24f9a3cdf1 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml @@ -0,0 +1,182 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm8350-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8350/SM8450 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm SM8350/SM8450 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm8350-adsp-pas + - qcom,sm8350-cdsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8350-mpss-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-cdsp-pas + - qcom,sm8450-mpss-pas + - qcom,sm8450-slpi-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8350-adsp-pas + - qcom,sm8350-cdsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-cdsp-pas + - qcom,sm8450-slpi-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sm8350-mpss-pas + - qcom,sm8450-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MSS power domain + power-domain-names: + items: + - const: cx + - const: mss + + - if: + properties: + compatible: + enum: + - qcom,sm8350-adsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-slpi-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sm8350-cdsp-pas + - qcom,sm8450-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + power-domain-names: + items: + - const: cx + - const: mxc + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + remoteproc@30000000 { + compatible = "qcom,sm8450-adsp-pas"; + reg = <0x030000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + firmware-name = "qcom/sm8450/adsp.mbn"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_mem>; + + power-domains = <&rpmhpd SM8450_LCX>, + <&rpmhpd SM8450_LMX>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml new file mode 100644 index 000000000000..fe216aa531ed --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8550 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +description: + Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + minItems: 2 + items: + - description: Memory region for main Firmware authentication + - description: Memory region for Devicetree Firmware authentication + - description: DSM Memory region + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + memory-region: + maxItems: 2 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + memory-region: + minItems: 3 + + - if: + properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sm8550-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MSS power domain + power-domain-names: + items: + - const: cx + - const: mss + - if: + properties: + compatible: + enum: + - qcom,sm8550-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + - description: NSP power domain + power-domain-names: + items: + - const: cx + - const: mxc + - const: nsp + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/mailbox/qcom-ipcc.h> + + remoteproc@30000000 { + compatible = "qcom,sm8550-adsp-pas"; + reg = <0x030000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_mem>, <&dtb_adsp_mem>; + + firmware-name = "qcom/sm8550/adsp.mbn", + "qcom/sm8550/adsp_dtb.mbn"; + + power-domains = <&rpmhpd_sm8550_lcx>, + <&rpmhpd_sm8550_lmx>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt deleted file mode 100644 index ac423f4c3f1b..000000000000 --- a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt +++ /dev/null @@ -1,177 +0,0 @@ -Qualcomm WCNSS Peripheral Image Loader - -This document defines the binding for a component that loads and boots firmware -on the Qualcomm WCNSS core. - -- compatible: - Usage: required - Value type: <string> - Definition: must be one of: - "qcom,riva-pil", - "qcom,pronto-v1-pil", - "qcom,pronto-v2-pil" - -- reg: - Usage: required - Value type: <prop-encoded-array> - Definition: must specify the base address and size of the CCU, DXE and - PMU register blocks - -- reg-names: - Usage: required - Value type: <stringlist> - Definition: must be "ccu", "dxe", "pmu" - -- interrupts-extended: - Usage: required - Value type: <prop-encoded-array> - Definition: must list the watchdog and fatal IRQs and may specify the - ready, handover and stop-ack IRQs - -- interrupt-names: - Usage: required - Value type: <stringlist> - Definition: should be "wdog", "fatal", optionally followed by "ready", - "handover", "stop-ack" - -- firmware-name: - Usage: optional - Value type: <string> - Definition: must list the relative firmware image path for the - WCNSS core. Defaults to "wcnss.mdt". - -- vddmx-supply: (deprecated for qcom,pronto-v1/2-pil) -- vddcx-supply: (deprecated for qcom,pronto-v1/2-pil) -- vddpx-supply: - Usage: required - Value type: <phandle> - Definition: reference to the regulators to be held on behalf of the - booting of the WCNSS core - -- power-domains: - Usage: required (for qcom,pronto-v1/2-pil) - Value type: <phandle> - Definition: reference to the power domains to be held on behalf of the - booting of the WCNSS core - -- power-domain-names: - Usage: required (for qcom,pronto-v1/2-pil) - Value type: <stringlist> - Definition: must be "cx", "mx" - -- qcom,smem-states: - Usage: optional - Value type: <prop-encoded-array> - Definition: reference to the SMEM state used to indicate to WCNSS that - it should shut down - -- qcom,smem-state-names: - Usage: optional - Value type: <stringlist> - Definition: should be "stop" - -- memory-region: - Usage: required - Value type: <prop-encoded-array> - Definition: reference to reserved-memory node for the remote processor - see ../reserved-memory/reserved-memory.txt - -= SUBNODES -A required subnode of the WCNSS PIL is used to describe the attached rf module -and its resource dependencies. It is described by the following properties: - -- compatible: - Usage: required - Value type: <string> - Definition: must be one of: - "qcom,wcn3620", - "qcom,wcn3660", - "qcom,wcn3660b", - "qcom,wcn3680" - -- clocks: - Usage: required - Value type: <prop-encoded-array> - Definition: should specify the xo clock and optionally the rf clock - -- clock-names: - Usage: required - Value type: <stringlist> - Definition: should be "xo", optionally followed by "rf" - -- vddxo-supply: -- vddrfa-supply: -- vddpa-supply: -- vdddig-supply: - Usage: required - Value type: <phandle> - Definition: reference to the regulators to be held on behalf of the - booting of the WCNSS core - - -The wcnss node can also have an subnode named "smd-edge" that describes the SMD -edge, channels and devices related to the WCNSS. -See ../soc/qcom/qcom,smd.yaml for details on how to describe the SMD edge. - -= EXAMPLE -The following example describes the resources needed to boot control the WCNSS, -with attached WCN3680, as it is commonly found on MSM8974 boards. - -pronto@fb204000 { - compatible = "qcom,pronto-v2-pil"; - reg = <0xfb204000 0x2000>, <0xfb202000 0x1000>, <0xfb21b000 0x3000>; - reg-names = "ccu", "dxe", "pmu"; - - interrupts-extended = <&intc 0 149 1>, - <&wcnss_smp2p_slave 0 0>, - <&wcnss_smp2p_slave 1 0>, - <&wcnss_smp2p_slave 2 0>, - <&wcnss_smp2p_slave 3 0>; - interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; - - power-domains = <&rpmpd MSM8974_VDDCX>, <&rpmpd MSM8974_VDDMX>; - power-domain-names = "cx", "mx"; - - vddpx-supply = <&pm8941_s3>; - - qcom,smem-states = <&wcnss_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - memory-region = <&wcnss_region>; - - pinctrl-names = "default"; - pinctrl-0 = <&wcnss_pin_a>; - - iris { - compatible = "qcom,wcn3680"; - - clocks = <&rpmcc RPM_CXO_CLK_SRC>, <&rpmcc RPM_CXO_A2>; - clock-names = "xo", "rf"; - - vddxo-supply = <&pm8941_l6>; - vddrfa-supply = <&pm8941_l11>; - vddpa-supply = <&pm8941_l19>; - vdddig-supply = <&pm8941_s3>; - }; - - smd-edge { - interrupts = <0 142 1>; - - qcom,ipc = <&apcs 8 17>; - qcom,smd-edge = <6>; - qcom,remote-pid = <4>; - - label = "pronto"; - - wcnss { - compatible = "qcom,wcnss"; - qcom,smd-channels = "WCNSS_CTRL"; - - qcom,mmio = <&pronto>; - - bt { - compatible = "qcom,wcnss-bt"; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml new file mode 100644 index 000000000000..45eb42bd3c2c --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml @@ -0,0 +1,294 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,wcnss-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCNSS Peripheral Image Loader + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + +description: + This document defines the binding for a component that loads and boots + firmware on the Qualcomm WCNSS core. + +properties: + compatible: + description: + Append "qcom,pronto" if the device is actually pronto, and not riva + oneOf: + - items: + - enum: + - qcom,pronto-v1-pil + - qcom,pronto-v2-pil + - qcom,pronto-v3-pil + - const: qcom,pronto + - const: qcom,riva-pil + + reg: + maxItems: 3 + description: + The base address and size of the CCU, DXE and PMU register blocks + + reg-names: + items: + - const: ccu + - const: dxe + - const: pmu + + interrupts: + minItems: 2 + maxItems: 5 + + interrupt-names: + minItems: 2 + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: + Relative firmware image path for the WCNSS core. Defaults to + "wcnss.mdt". + + vddpx-supply: + description: + PX regulator to be held on behalf of the booting of the WCNSS core + + vddmx-supply: + description: + MX regulator to be held on behalf of the booting of the WCNSS core. + + vddcx-supply: + description: + CX regulator to be held on behalf of the booting of the WCNSS core. + + power-domains: + maxItems: 2 + + power-domain-names: + items: + - const: cx + - const: mx + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + States used by the AP to signal the WCNSS core that it should shutdown + items: + - description: Stop the modem + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output + items: + - const: stop + + memory-region: + maxItems: 1 + description: reserved-memory for the WCNSS core + + smd-edge: + $ref: /schemas/remoteproc/qcom,smd-edge.yaml# + description: + Qualcomm Shared Memory subnode which represents communication edge, + channels and devices related to the ADSP. + + iris: + type: object + description: + The iris subnode of the WCNSS PIL is used to describe the attached RF module + and its resource dependencies. + + properties: + compatible: + enum: + - qcom,wcn3620 + - qcom,wcn3660 + - qcom,wcn3660b + - qcom,wcn3680 + + clocks: + minItems: 1 + items: + - description: XO clock + - description: RF clock + + clock-names: + minItems: 1 + items: + - const: xo + - const: rf + + vddxo-supply: + description: + Reference to the regulator to be held on behalf of the booting WCNSS + core + + vddrfa-supply: + description: + Reference to the regulator to be held on behalf of the booting WCNSS + core + + vddpa-supply: + description: + Reference to the regulator to be held on behalf of the booting WCNSS + core + + vdddig-supply: + description: + Reference to the regulator to be held on behalf of the booting WCNSS + core + + required: + - compatible + - clocks + - clock-names + - vddxo-supply + - vddrfa-supply + - vddpa-supply + - vdddig-supply + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - iris + - vddpx-supply + - memory-region + - smd-edge + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: qcom,riva-pil + then: + required: + - vddcx-supply + - vddmx-supply + + - if: + properties: + compatible: + contains: + enum: + - qcom,pronto-v1-pil + - qcom,pronto-v2-pil + then: + properties: + vddmx-supply: + deprecated: true + description: Deprecated for qcom,pronto-v1/2-pil + + vddcx-supply: + deprecated: true + description: Deprecated for qcom,pronto-v1/2-pil + + oneOf: + - required: + - power-domains + - power-domain-names + - required: + - vddmx-supply + - vddcx-supply + + - if: + properties: + compatible: + contains: + enum: + - qcom,pronto-v3-pil + then: + properties: + vddmx-supply: false + vddcx-supply: false + + required: + - power-domains + - power-domain-names + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,rpmcc.h> + #include <dt-bindings/power/qcom-rpmpd.h> + pronto@a21b000 { + compatible = "qcom,pronto-v2-pil", "qcom,pronto"; + reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>; + reg-names = "ccu", "dxe", "pmu"; + + interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; + + power-domains = <&rpmpd MSM8916_VDDCX>, <&rpmpd MSM8916_VDDMX>; + power-domain-names = "cx", "mx"; + + vddpx-supply = <&pm8916_l7>; + + qcom,smem-states = <&wcnss_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + memory-region = <&wcnss_region>; + + pinctrl-names = "default"; + pinctrl-0 = <&wcnss_pin_a>; + + iris { + compatible = "qcom,wcn3620"; + vddxo-supply = <&pm8916_l7>; + vddrfa-supply = <&pm8916_s3>; + vddpa-supply = <&pm8916_l9>; + vdddig-supply = <&pm8916_l5>; + + clocks = <&rpmcc RPM_SMD_RF_CLK2>; + clock-names = "xo"; + }; + + smd-edge { + interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>; + + qcom,ipc = <&apcs 8 17>; + qcom,smd-edge = <6>; + qcom,remote-pid = <4>; + + label = "pronto"; + + wcnss_ctrl: wcnss { + compatible = "qcom,wcnss"; + qcom,smd-channels = "WCNSS_CTRL"; + + qcom,mmio = <&pronto>; + + bluetooth { + compatible = "qcom,wcnss-bt"; + }; + + wifi { + compatible = "qcom,wcnss-wlan"; + + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tx", "rx"; + + qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>; + qcom,smem-state-names = "tx-enable", "tx-rings-empty"; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml index cedbc5efdc56..f16e90380df1 100644 --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml @@ -31,10 +31,12 @@ allOf: properties: compatible: enum: + - ti,am62a-c7xv-dsp - ti,j721e-c66-dsp - ti,j721e-c71-dsp - ti,j721s2-c71-dsp description: + Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs @@ -109,6 +111,7 @@ else: properties: compatible: enum: + - ti,am62a-c7xv-dsp - ti,j721e-c71-dsp - ti,j721s2-c71-dsp then: diff --git a/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml new file mode 100644 index 000000000000..c6d86964b72a --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/ti,pru-consumer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common TI PRU Consumer Binding + +maintainers: + - Suman Anna <s-anna@ti.com> + +description: | + A PRU application/consumer/user node typically uses one or more PRU device + nodes to implement a PRU application/functionality. Each application/client + node would need a reference to at least a PRU node, and optionally define + some properties needed for hardware/firmware configuration. The below + properties are a list of common properties supported by the PRU remoteproc + infrastructure. + + The application nodes shall define their own bindings like regular platform + devices, so below are in addition to each node's bindings. + +properties: + ti,prus: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: phandles to the PRU, RTU or Tx_PRU nodes used + minItems: 1 + maxItems: 6 + items: + maxItems: 1 + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + minItems: 1 + maxItems: 6 + description: | + firmwares for the PRU cores, the default firmware for the core from + the PRU node will be used if not provided. The firmware names should + correspond to the PRU cores listed in the 'ti,prus' property + + ti,pruss-gp-mux-sel: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 6 + items: + enum: [0, 1, 2, 3, 4] + description: | + array of values for the GP_MUX_SEL under PRUSS_GPCFG register for a PRU. + This selects the internal muxing scheme for the PRU instance. Values + should correspond to the PRU cores listed in the 'ti,prus' property. The + GP_MUX_SEL setting is a per-slice setting (one setting for PRU0, RTU0, + and Tx_PRU0 on K3 SoCs). Use the same value for all cores within the + same slice in the associative array. If the array size is smaller than + the size of 'ti,prus' property, the default out-of-reset value (0) for the + PRU core is used. + +required: + - ti,prus + +additionalProperties: true |