Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Olof Johansson:
 "Most of this branch consists of updates, additions and general churn
  of the device tree source files in the kernel (arch/arm/boot/dts).
  Besides that, there are a few things to point out:

   - Lots of platform conversion on OMAP2+, with removal of old board
     files for various platforms.
   - Final conversion of a bunch of ux500 (ST-Ericsson) platforms as
     well
   - Some updates to pinctrl and other subsystems.  Most of these are
     for DT-enablement of the various platforms and acks have been
     collected"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (385 commits)
  ARM: dts: bcm11351: Use GIC/IRQ defines for sdio interrupts
  ARM: dts: bcm: Add missing UARTs for bcm11351 (bcm281xx)
  ARM: dts: bcm281xx: Add card detect GPIO
  ARM: dts: rename ARCH_BCM to ARCH_BCM_MOBILE (dt)
  ARM: bcm281xx: Add device node for the GPIO controller
  ARM: mvebu: Add Netgear ReadyNAS 104 board
  ARM: tegra: fix Tegra114 IOMMU register address
  ARM: kirkwood: add support for OpenBlocks A7 platform
  ARM: dts: omap4-panda: add DPI pinmuxing
  ARM: dts: AM33xx: Add RNG node
  ARM: dts: AM33XX: Add hwspinlock node
  ARM: dts: OMAP5: Add hwspinlock node
  ARM: dts: OMAP4: Add hwspinlock node
  ARM: dts: use 'status' property for PCIe nodes
  ARM: dts: sirf: add missed address-cells and size-cells for prima2 I2C
  ARM: dts: sirf: add missed cell, cs and dma channel for SPI nodes
  ARM: dts: sirf: add missed graphics2d iobg in atlas6 dts
  ARM: dts: sirf: add missed chhifbg node in prima2 and atlas6 dts
  ARM: dts: sirf: add missed memcontrol-monitor node in prima2 and atlas6 dts
  ARM: mvebu: Add the core-divider clock to Armada 370/XP
  ...

1 files changed, 11 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
index 5a02e30dd262..7069a0b84e3a 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
@@ -72,6 +72,13 @@ Optional properties:
 		/* pin base, nr pins & gpio function */
 		pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>;
 
+- interrupt-controller : standard interrupt controller binding if using
+  interrupts for wake-up events for example. In this case pinctrl-single
+  is set up as a chained interrupt controller and the wake-up interrupts
+  can be requested by the drivers using request_irq().
+
+- #interrupt-cells : standard interrupt binding if using interrupts
+
 This driver assumes that there is only one register for each pin (unless the
 pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
 specified in the pinctrl-bindings.txt document in this directory.
@@ -121,6 +128,8 @@ pmx_core: pinmux@4a100040 {
 	reg = <0x4a100040 0x0196>;
 	#address-cells = <1>;
 	#size-cells = <0>;
+	#interrupt-cells = <1>;
+	interrupt-controller;
 	pinctrl-single,register-width = <16>;
 	pinctrl-single,function-mask = <0xffff>;
 };
@@ -131,6 +140,8 @@ pmx_wkup: pinmux@4a31e040 {
 	reg = <0x4a31e040 0x0038>;
 	#address-cells = <1>;
 	#size-cells = <0>;
+	#interrupt-cells = <1>;
+	interrupt-controller;
 	pinctrl-single,register-width = <16>;
 	pinctrl-single,function-mask = <0xffff>;
 };