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authorYakir Yang <ykk@rock-chips.com>2016-02-15 14:01:43 +0300
committerKishon Vijay Abraham I <kishon@ti.com>2016-03-01 14:43:50 +0300
commit12df9c50568a08db0b38fb70f088b80ec2793191 (patch)
treef766844af1cee91e8f577ccf525da31c0046364e /Documentation/devicetree/bindings/phy
parentfd968973de95c68982babf3d9723dcde2f2a87cf (diff)
downloadlinux-12df9c50568a08db0b38fb70f088b80ec2793191.tar.xz
dt-bindings: add document for rockchip dp phy
Add dt binding documentation for rockchip display port PHY. Signed-off-by: Yakir Yang <ykk@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
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diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
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+Rockchip specific extensions to the Analogix Display Port PHY
+------------------------------------
+
+Required properties:
+- compatible : should be one of the following supported values:
+ - "rockchip.rk3288-dp-phy"
+- clocks: from common clock binding: handle to dp clock.
+ of memory mapped region.
+- clock-names: from common clock binding:
+ Required elements: "24m"
+- rockchip,grf: phandle to the syscon managing the "general register files"
+- #phy-cells : from the generic PHY bindings, must be 0;
+
+Example:
+
+edp_phy: edp-phy {
+ compatible = "rockchip,rk3288-dp-phy";
+ rockchip,grf = <&grf>;
+ clocks = <&cru SCLK_EDP_24M>;
+ clock-names = "24m";
+ #phy-cells = <0>;
+};