diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-05-22 10:28:16 +0300 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-05-22 10:28:16 +0300 |
commit | 14f3a5ccacdb4268764474d834ee353219dbd1a2 (patch) | |
tree | efbae1e87b82a81a5a72f13cfa770a8d92fa024e /Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml | |
parent | e9ccc35b86653cb15e9bffbe2cbef8781ea2c1dd (diff) | |
parent | ac0a95a3ea7811f5cc4489924ddb54f0ea0f3007 (diff) | |
download | linux-14f3a5ccacdb4268764474d834ee353219dbd1a2.tar.xz |
Merge tag 'phy-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into usb-next
Kishon writes:
phy: for 5.8
*) Add new PHY driver to support Cadence SALVO PHY which supports USB3 & USB2
*) Add new PHY driver to support Intel ComboPhy which supports PCIe, SATA and
EMAC
*) Add new PHY driver for Qualcomm IPQ40xx USB PHY
*) Add new PHY driver for Synopsys FemtoPHY V2 driver used in Qualcomm SOCs
*) Add support for Qualcomm SM8250 UFS PHY and SM8150 QMP USB3 PHY in
qcom-qmp-phy driver
*) Add support for Amlogic USB2 PHY on Meson8m2 in phy-meson8b-usb2 driver
*) Add DisplayPort mode support in Wiz (TI Cadence PHY wrapper), to enable eDP
in TI's J721E SoC
*) Add support for super speed USB PHY in TI's AM654 SoC
*) Add fix in Broadcom Stingray USB PHY to get USB PHY PLL lock reliably
*) Add fix in Samsung phy-s5pv210-usb2 to get USB working on s5pv210
*) Add fix in Amlogic phy-meson8b-usb2 to get host only mode working on Meson8
*) Add fix in Cadence phy-cadence-sierra to get USB3 device disconnect issue
*) Convert meson8b-usb2-phy, qcom-qmp-phy, rcar-gen3-phy-usb2 and
rcar-gen3-phy-usb3 device tree binding to YAML schema
*) Minor fixes and cleanups in phy-cpcap-usb, j721e-wiz, omap-usb2,
phy-bcm-sr-usb, phy-brcm-usb PHY driver
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (43 commits)
phy: intel: Add driver support for ComboPhy
dt-bindings: phy: Add YAML schemas for Intel ComboPhy
dt-bindings: phy: Add PHY_TYPE_XPCS definition
phy: qcom-qmp: Add QMP V3 USB3 PHY support for SC7180
dt-bindings: phy: qcom,qmp-usb3-dp: Add support for SC7180
dt-bindings: phy: qcom,qmp-usb3-dp: Add dt bindings for USB3 DP PHY
dt-bindings: phy: qcom,qmp: Convert QMP PHY bindings to yaml
phy: cadence: sierra: Fix for USB3 U1/U2 state
phy: ti: am654: add support for USB super-speed
phy: ti: am654: show up in regmap debugfs
drivers: phy: sr-usb: do not use internal fsm for USB2 phy init
dt-bindings: phy: renesas: usb3-phy: add r8a77961 support
dt-bindings: phy: renesas: usb3-phy: convert bindings to json-schema
dt-bindings: phy: renesas: usb2-phy: add r8a77961 support
dt-bindings: phy: renesas: usb2-phy: convert bindings to json-schema
phy: qcom-qmp: Ensure register indirection arrays initialized
phy: omap-usb2: Clean up exported header
phy: phy-bcm-ns2-usbdrd: Constify phy_ops
phy: phy-brcm-usb: Constify static structs
phy: sr-usb: Constify phy_ops
...
Diffstat (limited to 'Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml new file mode 100644 index 000000000000..574f890fab1d --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Synopsys Femto High-Speed USB PHY V2 + +maintainers: + - Wesley Cheng <wcheng@codeaurora.org> + +description: | + Qualcomm High-Speed USB PHY + +properties: + compatible: + enum: + - qcom,usb-snps-hs-7nm-phy + - qcom,sm8150-usb-hs-phy + - qcom,usb-snps-femto-v2-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: rpmhcc ref clock + + clock-names: + items: + - const: ref + + resets: + items: + - description: PHY core reset + + vdda-pll-supply: + description: phandle to the regulator VDD supply node. + + vdda18-supply: + description: phandle to the regulator 1.8V supply node. + + vdda33-supply: + description: phandle to the regulator 3.3V supply node. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - resets + - vdda-pll-supply + - vdda18-supply + - vdda33-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,gcc-sm8150.h> + phy@88e2000 { + compatible = "qcom,sm8150-usb-hs-phy"; + reg = <0 0x088e2000 0 0x400>; + #phy-cells = <0>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "ref"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + + vdda-pll-supply = <&vdd_usb_hs_core>; + vdda33-supply = <&vdda_usb_hs_3p1>; + vdda18-supply = <&vdda_usb_hs_1p8>; + }; +... |