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authorMurali Karicheri <m-karicheri2@ti.com>2014-09-10 21:12:38 +0400
committerBjorn Helgaas <bhelgaas@google.com>2014-09-17 01:45:45 +0400
commit4455efc90855ff5a6065caea835b0d13a284c5a1 (patch)
treed6fd97a368d2b74129260e7ff968a33a94def507 /Documentation/devicetree/bindings/pci/pci-keystone.txt
parentc15982dfa8227f3e8fd2a6e2e13a009a9991d96c (diff)
downloadlinux-4455efc90855ff5a6065caea835b0d13a284c5a1.tar.xz
PCI: keystone: Assume controller is already in RC mode
Keystone PCI hardware supports both RC and EP modes and devcfg register has bits to boot strap the device to either of these modes. It seems proper to add this functionality to the boot loader rather than in the driver as device will be operating in either mode, not both any time. Currently the driver supports only RC mode and hence register configuration in the driver is not needed and the driver can assume the hardware is in RC mode. Also update the DT documentation accordingly. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/pci-keystone.txt')
-rw-r--r--Documentation/devicetree/bindings/pci/pci-keystone.txt4
1 files changed, 1 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt
index de9c475b66f4..54eae2938174 100644
--- a/Documentation/devicetree/bindings/pci/pci-keystone.txt
+++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt
@@ -13,9 +13,7 @@ Required Properties:-
compatibility: "ti,keystone-pcie"
reg: index 1 is the base address and length of DW application registers.
- index 2 is the base address and length of PCI mode configuration
- register.
- index 3 is the base address and length of PCI device ID register.
+ index 2 is the base address and length of PCI device ID register.
pcie_msi_intc : Interrupt controller device node for MSI IRQ chip
interrupt-cells: should be set to 1