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authorBrian Norris <computersforpeace@gmail.com>2015-02-28 12:25:17 +0300
committerBrian Norris <computersforpeace@gmail.com>2015-03-25 00:21:26 +0300
commit0542e135fa8c56cd03c02d74089750ae9195eb22 (patch)
tree4c2e474685eafacbbc4257b0c4d8f49b13ce994a /Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
parent7234bea69de200e2060d099685c4c674b556edc0 (diff)
downloadlinux-0542e135fa8c56cd03c02d74089750ae9195eb22.tar.xz
Documentation: devicetree: fix spelling in pxa3xx-nand binding
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt')
-rw-r--r--Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
index de8b517a5521..4f833e3c4f51 100644
--- a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
@@ -14,7 +14,7 @@ Optional properties:
- marvell,nand-enable-arbiter: Set to enable the bus arbiter
- marvell,nand-keep-config: Set to keep the NAND controller config as set
by the bootloader
- - num-cs: Number of chipselect lines to usw
+ - num-cs: Number of chipselect lines to use
- nand-on-flash-bbt: boolean to enable on flash bbt option if
not present false
- nand-ecc-strength: number of bits to correct per ECC step