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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2020-05-15 03:25:28 +0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-07-19 15:21:42 +0300 |
| commit | cc4fcf11a8d9d249db479f1ef16e6d26c830b245 (patch) | |
| tree | 9a048f38c9c83b47cc0bb061e520ef6113bdc077 /Documentation/devicetree/bindings/media | |
| parent | 6a72c8d3cdeb582c3574f85e98394cd81b1d7640 (diff) | |
| download | linux-cc4fcf11a8d9d249db479f1ef16e6d26c830b245.tar.xz | |
media: dt-bindings: media: renesas,vsp1: Add power-domains and resets
The power-domains and resets properties are used in all DT sources in
the kernel but are absent from the bindings. Document them and make them
mandatory.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/media')
| -rw-r--r-- | Documentation/devicetree/bindings/media/renesas,vsp1.yaml | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml index 65e8ee61ce90..990e9c1dbc43 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml @@ -29,6 +29,12 @@ properties: clocks: maxItems: 1 + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + renesas,fcp: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -39,6 +45,8 @@ required: - reg - interrupts - clocks + - power-domains + - resets additionalProperties: false @@ -59,24 +67,30 @@ examples: - | #include <dt-bindings/clock/renesas-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7790-sysc.h> vsp@fe928000 { compatible = "renesas,vsp1"; reg = <0xfe928000 0x8000>; interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 131>; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 131>; }; # R8A77951 (R-Car H3) VSP2-BC - | #include <dt-bindings/clock/renesas-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7795-sysc.h> vsp@fe920000 { compatible = "renesas,vsp2"; reg = <0xfe920000 0x8000>; interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 624>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 624>; renesas,fcp = <&fcpvb1>; }; |