diff options
| author | Jean-Philippe Brucker <jean-philippe@linaro.org> | 2021-05-26 19:19:26 +0300 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-06-08 14:35:50 +0300 |
| commit | ed1d08b9d0c9baed54a74073eae6c28d1e5422e8 (patch) | |
| tree | c52c11af082815609f710e45ba20ed766584c27c /Documentation/devicetree/bindings/iommu | |
| parent | 19c07b91f85dfcf058ce304374988c9f83b5066c (diff) | |
| download | linux-ed1d08b9d0c9baed54a74073eae6c28d1e5422e8.tar.xz | |
dt-bindings: Document stall property for IOMMU masters
On ARM systems, some platform devices behind an IOMMU may support stall,
which is the ability to recover from page faults. Let the firmware tell us
when a device supports stall.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Link: https://lore.kernel.org/r/20210526161927.24268-2-jean-philippe@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/iommu')
| -rw-r--r-- | Documentation/devicetree/bindings/iommu/iommu.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/iommu.txt b/Documentation/devicetree/bindings/iommu/iommu.txt index 3c36334e4f94..26ba9e530f13 100644 --- a/Documentation/devicetree/bindings/iommu/iommu.txt +++ b/Documentation/devicetree/bindings/iommu/iommu.txt @@ -92,6 +92,24 @@ Optional properties: tagging DMA transactions with an address space identifier. By default, this is 0, which means that the device only has one address space. +- dma-can-stall: When present, the master can wait for a transaction to + complete for an indefinite amount of time. Upon translation fault some + IOMMUs, instead of aborting the translation immediately, may first + notify the driver and keep the transaction in flight. This allows the OS + to inspect the fault and, for example, make physical pages resident + before updating the mappings and completing the transaction. Such IOMMU + accepts a limited number of simultaneous stalled transactions before + having to either put back-pressure on the master, or abort new faulting + transactions. + + Firmware has to opt-in stalling, because most buses and masters don't + support it. In particular it isn't compatible with PCI, where + transactions have to complete before a time limit. More generally it + won't work in systems and masters that haven't been designed for + stalling. For example the OS, in order to handle a stalled transaction, + may attempt to retrieve pages from secondary storage in a stalled + domain, leading to a deadlock. + Notes: ====== |