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authorAndrea Gelmini <andrea.gelmini@gelma.net>2016-05-21 14:38:10 +0300
committerWill Deacon <will.deacon@arm.com>2016-07-01 16:04:36 +0300
commit560829b4f6c34adae82082fe86d21e7c6cdc4eaf (patch)
tree0a0b5c181a7f717cfa7c57b6d457c868857c5b85 /Documentation/devicetree/bindings/iommu
parentaf8c34ce6ae32addda3788d54a7e340cad22516b (diff)
downloadlinux-560829b4f6c34adae82082fe86d21e7c6cdc4eaf.tar.xz
iommu/arm-smmu: Fix typo in devicetree binding introductory text
This may well be the world's most inconsequential patch, but there is a spelling mistake that needs fixing and Andrea was bored enough to write the patch (along with 1528 others...). Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'Documentation/devicetree/bindings/iommu')
-rw-r--r--Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
index 947863acc2d4..7b94c88cf2ee 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
@@ -1,6 +1,6 @@
* ARM SMMUv3 Architecture Implementation
-The SMMUv3 architecture is a significant deparature from previous
+The SMMUv3 architecture is a significant departure from previous
revisions, replacing the MMIO register interface with in-memory command
and event queues and adding support for the ATS and PRI components of
the PCIe specification.