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authorLudovic Barre <ludovic.barre@st.com>2018-04-26 19:18:30 +0300
committerMarc Zyngier <marc.zyngier@arm.com>2018-05-24 14:38:22 +0300
commit927abfc4461e7fd76d5bba593dabdec381571021 (patch)
tree315a582263eb9c674023f868dce8d4b285d02bcf /Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt
parent5a2490e029c29065c6bc2f63c10a985f85522998 (diff)
downloadlinux-927abfc4461e7fd76d5bba593dabdec381571021.tar.xz
irqchip/stm32: Add stm32mp1 support with hierarchy domain
Exti controller has been differently integrated on stm32mp1 SoC. A parent irq has only one external interrupt. A hierachy domain could be used. Handlers are call by parent, each parent interrupt could be masked and unmasked according to the needs. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt
index edf03f09244b..136bd612bd83 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt
@@ -5,11 +5,14 @@ Required properties:
- compatible: Should be:
"st,stm32-exti"
"st,stm32h7-exti"
+ "st,stm32mp1-exti"
- reg: Specifies base physical address and size of the registers
- interrupt-controller: Indentifies the node as an interrupt controller
- #interrupt-cells: Specifies the number of cells to encode an interrupt
specifier, shall be 2
- interrupts: interrupts references to primary interrupt controller
+ (only needed for exti controller with multiple exti under
+ same parent interrupt: st,stm32-exti and st,stm32h7-exti")
Example: