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author | Yoshihiro Kaneko <ykaneko0929@gmail.com> | 2020-05-07 10:55:03 +0300 |
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committer | Rob Herring <robh@kernel.org> | 2020-05-15 05:48:36 +0300 |
commit | 0be4ae74881c96ae8ff718bcfb517415ab61a41e (patch) | |
tree | 6adc16c47a19da610e446438ba1033ef5b98391e /Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt | |
parent | fba5618451d2b3af5e55f8af5ce9c5d3677ad9c4 (diff) | |
download | linux-0be4ae74881c96ae8ff718bcfb517415ab61a41e.tar.xz |
dt-bindings: irqchip: renesas-intc-irqpin: Convert to json-schema
Convert the Renesas Interrupt Controller (INTC) for external pins Device
Tree binding documentation to json-schema.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Co-developed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[robh: drop allOf]
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt')
-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt deleted file mode 100644 index 772c550d3b4b..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt +++ /dev/null @@ -1,62 +0,0 @@ -DT bindings for the R-/SH-Mobile irqpin controller - -Required properties: - -- compatible: has to be "renesas,intc-irqpin-<soctype>", "renesas,intc-irqpin" - as fallback. - Examples with soctypes are: - - "renesas,intc-irqpin-r8a7740" (R-Mobile A1) - - "renesas,intc-irqpin-r8a7778" (R-Car M1A) - - "renesas,intc-irqpin-r8a7779" (R-Car H1) - - "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5) - -- reg: Base address and length of each register bank used by the external - IRQ pins driven by the interrupt controller hardware module. The base - addresses, length and number of required register banks varies with soctype. -- interrupt-controller: Identifies the node as an interrupt controller. -- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in - interrupts.txt in this directory. -- interrupts: Must contain a list of interrupt specifiers. For each interrupt - provided by this irqpin controller instance, there must be one entry, - referring to the corresponding parent interrupt. - -Optional properties: - -- any properties, listed in interrupts.txt, and any standard resource allocation - properties -- sense-bitfield-width: width of a single sense bitfield in the SENSE register, - if different from the default 4 bits -- control-parent: disable and enable interrupts on the parent interrupt - controller, needed for some broken implementations -- clocks: Must contain a reference to the functional clock. This property is - mandatory if the hardware implements a controllable functional clock for - the irqpin controller instance. -- power-domains: Must contain a reference to the power domain. This property is - mandatory if the irqpin controller instance is part of a controllable power - domain. - - -Example -------- - - irqpin1: interrupt-controller@e6900004 { - compatible = "renesas,intc-irqpin-r8a7740", - "renesas,intc-irqpin"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0xe6900004 4>, - <0xe6900014 4>, - <0xe6900024 1>, - <0xe6900044 1>, - <0xe6900064 1>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH - 0 149 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp2_clks R8A7740_CLK_INTCA>; - power-domains = <&pd_a4s>; - }; |